Method of making vertical structure semiconductor devices including forming hard and soft copper layers
First Claim
1. A method of fabricating semiconductor devices, comprising the steps of:
- forming a plurality of semiconductor layers over an insulated substrate, at least one of said plurality of semiconductor layers comprises GaN;
forming a plurality of metal support layers deposited using electroplating including a copper layer plated using cyanide or acid-base bath and a sulfate-base copper alloy layer over a first side of said plurality of semiconductor layers;
removing said insulated substrate from said plurality of semiconductor layers;
forming one or more electrical contacts, after said insulated substrate was removed, over a second side of said plurality of semiconductor layers wherein said second side is opposite said first side; and
separating said plurality of semiconductor layers into a plurality of individual semiconductor devices.
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Accused Products
Abstract
The invention provides a reliable way to fabricate a new vertical structure compound semiconductor device with improved light output and a laser lift-off processes for mass production of GaN-based compound semiconductor devices. A theme of the invention is employing direct metal support substrate deposition prior to the LLO by an electro-plating method to form an n-side top vertical structure. In addition, an ITO DBR layer is employed right next to a p-contact layer to enhance the light output by higher reflectivity. A perforated metal wafer carrier is also used for wafer bonding for easy handling and de-bonding. A new fabrication process is more reliable compared to the conventional LLO-based vertical device fabrication. Light output of the new vertical device having n-side up structure is increased 2 or 3 times higher than that of the lateral device fabricated with same GaN/InGaN epitaxial films.
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Citations
21 Claims
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1. A method of fabricating semiconductor devices, comprising the steps of:
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forming a plurality of semiconductor layers over an insulated substrate, at least one of said plurality of semiconductor layers comprises GaN; forming a plurality of metal support layers deposited using electroplating including a copper layer plated using cyanide or acid-base bath and a sulfate-base copper alloy layer over a first side of said plurality of semiconductor layers; removing said insulated substrate from said plurality of semiconductor layers; forming one or more electrical contacts, after said insulated substrate was removed, over a second side of said plurality of semiconductor layers wherein said second side is opposite said first side; and separating said plurality of semiconductor layers into a plurality of individual semiconductor devices. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9)
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10. A method of fabricating a light emitting semiconductor device, comprising the steps of:
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forming a diode structure over a substrate; forming a plurality of metal layers over a first side of said diode structure; forming an Indium Tin Oxide (ITO) layer including a copper layer plated using cyanide or acid-base bath and a sulfate-base copper alloy layer over said diode structure; removing said substrate from said diode structure; forming one or more contacts over a second side of said diode structure where said substrate was removed, said second side being opposite said first side; and separating said diode structure into a plurality of individual diodes wherein said removing includes applying a laser beam to an interface between said diode structure and said substrate, inserting diffusing media between a laser source that produces said laser beam and said substrate, and liquefying at least a portion of a first buffer layer formed over said substrate. - View Dependent Claims (11, 12, 13, 14)
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15. A method of fabricating semiconducter devices, comprising:
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forming a GaN-containing layer over a substrate; forming a p-type ITO layer, said p-type ITO layer being disposed toward a first side of said GaN-containing layer; forming a metal support layer, said metal support layer being disposed toward said first side of said GaN-containing layer, said metal support layer being deposited using electroplating including a copper layer plated using cyanide or acid-base bath and a sulfate-base copper alloy layer, wherein said p-type ITO layer is disposed between said GaN-containing layer and said metal support layer; removing said substrate front said GaN-containing layer; forming one or more electrical contacts, after said substrate was removed, toward a second side of said GaN-containing layer, wherein said second side is opposite said first side. - View Dependent Claims (16, 17, 18, 19, 20, 21)
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Specification