Method of making vertical structure semiconductor devices including forming hard and soft copper layers

• US 7,465,592 B2
• Filed: 04/27/2005
• Issued: 12/16/2008
• Est. Priority Date: 04/28/2004
• Status: Expired due to Fees

• Current Assignee: Verticle, Inc.
• Original Assignee: Verticle, Inc.
• Inventors: Yoo, Myung Cheol
• Primary Examiner(s): LEE, HSIEN MING
• Application Number:
  US11/117,084
• Publication Number:
  US 20050242365A1
• Time in Patent Office: 1,329 Days
• Field of Search: 438/28, 438/46, 438/455, 438/22, 438/24, 438/30, 438/57, 438/68, 438/77, 257/E33.025, 257/80, 257/88, 257/94, 257/96
• US Class Current: 438/22
• CPC Class Codes: B82Y 20/00 Nanooptics, e.g. quantum optics or photonic crystals
• CPC Class Codes: H01L 21/268 using electromagnetic radiation, e.g. laser radiation
• CPC Class Codes: H01L 2224/45144 Gold (Au) as principal constituent
• CPC Class Codes: H01L 2224/48463 the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
• CPC Class Codes: H01L 2224/73265 Layer and wire connectors
• CPC Class Codes: H01L 2224/85181 connecting first on the semiconductor or solid-state body, i.e. on-chip, regular stitch
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 33/0093 Wafer bonding; Removal of the growth substrate
• CPC Class Codes: H01L 33/32 containing nitrogen
• CPC Class Codes: H01L 33/46 Reflective coating, e.g. dielectric Bragg reflector

Abstract

The invention provides a reliable way to fabricate a new vertical structure compound semiconductor device with improved light output and a laser lift-off processes for mass production of GaN-based compound semiconductor devices. A theme of the invention is employing direct metal support substrate deposition prior to the LLO by an electro-plating method to form an n-side top vertical structure. In addition, an ITO DBR layer is employed right next to a p-contact layer to enhance the light output by higher reflectivity. A perforated metal wafer carrier is also used for wafer bonding for easy handling and de-bonding. A new fabrication process is more reliable compared to the conventional LLO-based vertical device fabrication. Light output of the new vertical device having n-side up structure is increased 2 or 3 times higher than that of the lateral device fabricated with same GaN/InGaN epitaxial films.

Claims

1. A method of fabricating semiconductor devices, comprising the steps of:

forming a plurality of semiconductor layers over an insulated substrate, at least one of said plurality of semiconductor layers comprises GaN;

forming a plurality of metal support layers deposited using electroplating including a copper layer plated using cyanide or acid-base bath and a sulfate-base copper alloy layer over a first side of said plurality of semiconductor layers;

removing said insulated substrate from said plurality of semiconductor layers;

forming one or more electrical contacts, after said insulated substrate was removed, over a second side of said plurality of semiconductor layers wherein said second side is opposite said first side; and

separating said plurality of semiconductor layers into a plurality of individual semiconductor devices.

2. The method of claim 1, further comprising the step of:

forming a buffer layer between said plurality of semiconductor layers and said insulated substrate.

3. The method of claim 1, wherein;

said removing includes applying a laser beam to an interface between said plurality of semiconductor layers and said insulated substrate, and inserting a diffusing media between a laser source that produces said laser beam and said insulated substrate for uniform laser beam energy distribution.

4. The method of claim 1, further comprising the step of:

attaching a perforated wafer carrier to said plurality of metal support layers.

5. The method of claim 2, further comprising the step of:

attaching a perforated wafer carrier to said plurality of metal support layers.

6. The method of claim 3, further comprising the step of:

attaching a perforated wafer carrier to said plurality of metal support layers.

7. The method of claim 2, wherein:

said separating includes forming a trench between two devices of said plurality of individual semiconductor devices, passivating exposed portions of said plurality of individual semiconductor devices, and transferring said plurality of individual semiconductor devices to a support film.

8. The method of claim 2, further comprising the step of:

assembling at least one of said plurality of individual semiconductor devices to a lead frame using a one-step die bonding and wire bonding technique.

9. The method of claim 7, further comprising the step of:

assembling at least one of said plurality of individual semiconductor devices to a lead frame using a one-step die bonding and wire bonding technique.

10. A method of fabricating a light emitting semiconductor device, comprising the steps of:

forming a diode structure over a substrate;

forming a plurality of metal layers over a first side of said diode structure;

forming an Indium Tin Oxide (ITO) layer including a copper layer plated using cyanide or acid-base bath and a sulfate-base copper alloy layer over said diode structure;

removing said substrate from said diode structure;

forming one or more contacts over a second side of said diode structure where said substrate was removed, said second side being opposite said first side; and

separating said diode structure into a plurality of individual diodes wherein said removing includes applying a laser beam to an interface between said diode structure and said substrate, inserting diffusing media between a laser source that produces said laser beam and said substrate, and liquefying at least a portion of a first buffer layer formed over said substrate.

11. The method of claim 10, wherein the said forming the said diode structure comprises the steps of:

depositing said first buffer layer including one of CaN and AlN over said substrate; and

depositing a n-GaN layer over said first buffer layer.

12. The method of claim 10, wherein said forming said diode structure comprises the steps of:

depositing said first buffer layer including one of GaN and AlN over said substrate;

depositing a second buffer layer including AlGaN over said substrate; and

depositing a n-GaN layer over said second buffer layer.

13. The method of claim 10, wherein:

said separating includes forming a trench between two diodes of said plurality of individual diodes, passivating exposed portions of said plurality of individual diodes, and transferring said plurality of individual diodes to a support film.

14. The method of claim 10, further comprising the step of:

attaching a wafer carrier to said plurality of metal layers.

15. A method of fabricating semiconducter devices, comprising:

forming a GaN-containing layer over a substrate;

forming a p-type ITO layer, said p-type ITO layer being disposed toward a first side of said GaN-containing layer;

forming a metal support layer, said metal support layer being disposed toward said first side of said GaN-containing layer, said metal support layer being deposited using electroplating including a copper layer plated using cyanide or acid-base bath and a sulfate-base copper alloy layer, wherein said p-type ITO layer is disposed between said GaN-containing layer and said metal support layer;

removing said substrate front said GaN-containing layer;

forming one or more electrical contacts, after said substrate was removed, toward a second side of said GaN-containing layer, wherein said second side is opposite said first side.

16. The method of claim 15, further comprising forming a buffer layer between said GaN-containing layer and said substrate.

17. The method of claim 15, wherein said removing includes applying a laser beam to an interface between said GaN-containing layer and said substrate, and inserting a diffusing media between a laser source that produces said laser beam and said substrate for uniform laser beam energy distribution.

18. The method of claim 15 further comprising forming a plurality of individual devices by creating trenches between at least two of said electrical contacts and passivating exposed portions of said plurality of individual devices after said creating.

19. The method of claim 18, further comprising assembling at least one of said plurality of individual devices to a lead frame using a one-step die bonding and wire bonding technique.

20. The method of claim 15 wherein said one or more electrical contacts includes n-contacts.

21. The method of claim 15 wherein said one or more electrical contacts includes n-ITO contacts.