Positioning of nanoparticles and fabrication of single election devices

• US 7,465,953 B1
• Filed: 04/27/2006
• Issued: 12/16/2008
• Est. Priority Date: 01/07/2005
• Status: Expired due to Fees

• Current Assignee: Board of Regents of the University of Texas System (University of Texas System)
• Original Assignee: Board of Regents of the University of Texas System (University of Texas System)
• Inventors: Koh, Seong Jin, Kim, Choong-Un, Subramanian, Ramkumar, Ma, Liang-Chieh
• Primary Examiner(s): PERT, EVAN T
• Application Number:
  US11/412,273
• Time in Patent Office: 964 Days
• Field of Search: 257/9, 257/213, 257/329, 257/E21.404, 438/142, 438/197, 438/268, 438/299
• US Class Current: 257/9
• CPC Class Codes: B82Y 10/00 Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
• CPC Class Codes: G01N 27/4146 involving nanosized elements, e.g. nanotubes, nanowires
• CPC Class Codes: H01L 29/40114 the electrodes comprising a conductor-insulator-conductor-insulator-semiconductor structure
• CPC Class Codes: H01L 29/7613 Single electron transistors; Coulomb blockade devices H01L29/7888 takes precedence
• CPC Class Codes: H01L 29/7888 Transistors programmable by two single electrons

Abstract

The present invention includes single electron structures and devices comprising a substrate having an upper surface, one or more dielectric layers formed on the upper surface of the substrate and having at least one exposed portion, at least one monolayer of self-assembling molecules attracted to and in contact with the at least one exposed portion of only one of the one or more dielectric layers, one or more nanoparticles attracted to and in contact with the at least one monolayer, and at least one tunneling barrier in contact with the one or more nanoparticles. Typically, the single electron structure or device formed therefrom further comprise a drain, a gate and a source to provide single electron behavior, wherein there is a defined gap between source and drain and the one or more nanoparticles is positioned between the source and drain.

Claims

1. A single electron structure comprising:

a substrate having an upper surface;

a first dielectric layer formed on the upper surface of the substrate;

a second dielectric layer defined with an exposed portion and deposited on the first dielectric layer and of a different material than the first dielectric layer;

a third dielectric layer defined and in contact with the second dielectric and of a different material than the second dielectric layer;

at least one monolayer having self-assembling molecules attracted to and in contact with the exposed portion of the second dielectric layer;

one or more nanoparticles attracted to and in contact with the at least one monolayer; and

a fourth dielectric layer deposited on a portion of the third dielectric layer and the nanoparticles thereby providing a single electron structure exhibiting single electron behavior.

2. The single electron structure of claim 1 wherein the first dielectric layer and the fourth dielectric layer act as tunneling barriers.

3. The single electron structure of claim 1 further comprising a drain, a gate and a source to provide single electron behavior.

4. The single electron structure of claim 3, wherein the drain is implanted on a portion of the substrate either before or after formation of the second dielectric layer.

5. The single electron structure of claim 3, wherein placement of the source and drain is precisely controlled and at least about 10 nm or less.

6. The single electron structure of claim 1, wherein the thickness of the first dielectric layer, second dielectric layer and third dielectric layer are controlled at the subnanometer level.

7. The single electron structure of claim 1, wherein the third dielectric layer acts as a spacer.

8. The single electron structure of claim 1, wherein the one or more nanoparticles consist of materials selected from the group consisting of semiconductor, metal, and combinations thereof.

9. The single electron structure of claim 1, wherein the single electron structure is capable of functioning as a device selected from the group consisting of memory device, logic device, electronic device, biologic sensor, chemical sensor, and combinations thereof.

10. The single electron structure of claim 9, wherein the device is capable of forming an integrated circuit.

11. The single electron structure of claim 1, wherein the second dielectric layer is selected from the group consisting of silicon oxide and aluminum oxide.

12. The single electron structure of claim 1, wherein the self-assembling molecules are selected from the group consisting of glycine and 3-aminopropyltriethoxysilane.

13. The single electron structure of claim 1, wherein the single electron structure is capable of forming an integrated circuit.

14. The single electron structure of claim 1, wherein the single electron structure is fabricated with silicon fabrication technology.

15. A method for fabricating a single electron structure comprising the steps of:

providing a substrate having an upper surface;

forming a first dielectric layer on the upper surface of the substrate;

depositing and defining a second dielectric layer in contact with the first dielectric layer, wherein the second dielectric layer is defined by an exposed portion and is a different material than the first dielectric layer;

forming and defining a third dielectric layer in contact with the second dielectric layer, wherein the third dielectric layer is a different material than the second dielectric layer;

having a monolayer of self-assembling molecules that selectively form on the exposed portion of the second dielectric layer;

providing one or more nanoparticles that contact the self-assembling molecules thereby providing a single electron structure exhibiting single electron behavior.

16. The method of claim 15, wherein the first dielectric layer acts as a tunneling barrier.

17. The method of claim 15 further comprising adding a fourth dielectric layer on the one or more nanoparticles as a tunneling barrier.

18. The method of claim 17 further comprising the step of forming a drain, a gate and a source to provide single electron behavior.

19. The method of claim 18, wherein the drain is implanted on a portion of the substrate either before or after formation of the second dielectric layer.

20. The method of claim 18, wherein placement of the source and drain is precisely controlled and at least about 10 nm apart or less.

21. The method of claim 15, wherein the thickness of first dielectric layer, second dielectric layer and third dielectric layer are controlled at the subnanometer level.

22. The method of claim 15, wherein the third dielectric layer acts as a spacer.

23. The method of claim 15, wherein the one or more nanoparticles consist of materials selected from the group consisting of semiconductor, metal, and combinations thereof.

24. The method of claim 15, wherein the single electron structure is capable of functioning as a device selected from the group consisting of memory device, logic device, electronic device, biologic sensor, chemical sensor, and combinations thereof.

25. The method of claim 24, wherein the device is capable of forming an integrated circuit.

26. The method of claim 15, wherein the second dielectric layer is selected from the group consisting of silicon oxide and aluminum oxide.

27. The method of claim 15, wherein the self-assembling molecules are selected from the group consisting of glycine and 3-aminopropyltriethoxysilane.

28. The method of claim 15, wherein the single electron structure is fabricated with silicon fabrication technology.

29. The method of claim 28, wherein the single electron memory is capable of forming an integrated circuit.

30. A single electron structure comprising:

a substrate having an upper surface;

a first dielectric layer formed on the upper surface of the substrate;

a second dielectric layer defined with exposed portions and deposited on the first dielectric layer and of a different material than the first dielectric layer;

a third dielectric layer defined and in contact with the second dielectric and of a different material than the second dielectric layer;

at least one self-assembled monolayer attracted to and in contact with exposed portions of the second dielectric layer;

one or more nanoparticles attracted to and in contact with the at least one self-assembled monolayer thereby providing a single electron memory device exhibiting single electron memory behavior.

31. The single electron structure of claim 30, wherein the first dielectric layer acts as a tunneling barrier.

32. The single electron structure of claim 30 further comprising a fourth dielectric layer formed on the one or more nanoparticles as a tunneling barrier.

33. The single electron structure of claim 32 further comprising a drain, a gate and a source to provide single electron behavior.

34. The single electron structure of claim 33, wherein the drain is implanted on a portion of the substrate either before or after formation of the second dielectric layer.

35. The single electron structure of claim 30, wherein the thickness of the first dielectric layer, second dielectric layer and third dielectric layer are controlled at the subnanometer level.

36. The single electron structure of claim 30, wherein the third dielectric layer acts as a spacer.

37. The single electron structure of claim 30, wherein the one or more nanoparticles consist of materials selected from the group consisting of semiconductor, metal, and combinations thereof.

38. The single electron structure of claim 30, wherein the single electron structure is capable of forming an integrated circuit.

39. The single electron structure of claim 30, wherein the single electron structure is a single electron memory with a floating gate.

40. The single electron structure of claim 39, wherein the single electron memory device is capable of forming an integrated circuit.

41. A method of selective positioning of nanoparticles on a single electron structure comprising the steps of:

forming a self-assembled monolayer on a portion of a single electron structure, wherein the self-assembled monolayer is capable of selectively recognizing only a portion of the single electron structure; and

contacting the self-assembled monolayer with at least one nanoparticle to provide a single electron structure exhibiting single electron behavior.

42. The method of claim 41, wherein the at least one nanoparticle consists of a material selected from the group consisting of semiconductor, metal, and combinations thereof.

43. The method of claim 41 further comprising forming a fourth dielectric layer on the one or more nanoparticles as a tunneling barrier.

44. The method of claim 41, wherein the single electron structure is capable of functioning as a device selected from the group consisting of memory device, logic device, electronic device, biologic sensor, chemical sensor, and combinations thereof.

45. The method of claim 44, wherein the device is capable of forming an integrated circuit.

46. The method of claim 41 further comprising removing the self-assembled monolayer after contacting the at least one nanoparticle.

48. The single electron structure of claim 46 further comprising a drain, a gate and a source to provide single electron behavior, wherein there is a defined gap between source and drain and the one or more nanoparticles is positioned between the source and drain.

49. The single electron structure of claim 48, wherein the defined gap between source and drain is at least about 10 nm or less.

47. A single electron structure comprising:

a substrate having an upper surface;

one or more dielectric layers formed on the upper surface of the substrate and having at least one exposed portion;

at least one monolayer of self-assembling molecules attracted to and in contact with the at least one exposed portion of only one of the one or more dielectric layers;

one or more nanoparticles attracted to and in contact with the at least one monolayer;

at least one tunneling barrier in contact with the one or more nanoparticles to provide single electron behavior.

50. The single electron structure of claim 47, wherein the single electron structure is capable of forming an integrated circuit.

51. A single electron structure comprising:

a substrate having an upper surface;

one or more dielectric layers formed on the upper surface of the substrate and having at least one exposed portion;

at least one monolayer of self-assembling molecules attracted to and in contact with the at least one exposed portion of only one of the one or more dielectric layers; and

one or more nanoparticles attracted to and in contact with the at least one monolayer;

a drain, a gate and a source to provide single electron behavior.

52. The single electron structure of claim 51, wherein there is a defined gap between the source and the one or more nanoparticles and between the drain and the one or more nanoparticles that provide a tunneling barrier.

53. The single electron structure of claim 51, wherein a distance between the gate and the one or more nanoparticles is precisely controlled.