Power semiconductor device including insulated source electrodes inside trenches
First Claim
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1. A power semiconductor device, comprising:
- a semiconductor body of a first conductivity type;
a plurality of gate trenches extending to a first depth within said semiconductor body;
a plurality of source trenches extending to a second depth within said semiconductor body, said second depth being greater than said first depth;
an insulated gate electrode within each of said plurality of gate trenches;
an insulated source electrode within each of said plurality of source trenches;
a channel region of a second conductivity type in said semiconductor body and having an etched surface adjacent to each of said plurality of source trenches;
source regions formed over said channel region; and
a source contact contacting said source regions, said source electrodes and contacting said channel region along said etched surfaces;
wherein said plurality of gate trenches and said plurality of source trenches are arranged in a cellular design and wherein said insulated source electrodes are recessed to a depth below said source regions and contact said source contact below said source regions.
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Abstract
A power semiconductor device includes a plurality of trenches formed within a semiconductor body, each trench including one or more electrodes formed therein. In particular, according to embodiments of the invention, the plurality of trenches of a semiconductor device may include one or more gate electrodes, may include one or more gate electrodes or one or more source electrodes, or may include a combination of both gate and source electrodes formed therein. The trenches and electrodes may have varying depths within the semiconductor body.
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Citations
34 Claims
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1. A power semiconductor device, comprising:
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a semiconductor body of a first conductivity type; a plurality of gate trenches extending to a first depth within said semiconductor body; a plurality of source trenches extending to a second depth within said semiconductor body, said second depth being greater than said first depth; an insulated gate electrode within each of said plurality of gate trenches; an insulated source electrode within each of said plurality of source trenches; a channel region of a second conductivity type in said semiconductor body and having an etched surface adjacent to each of said plurality of source trenches; source regions formed over said channel region; and a source contact contacting said source regions, said source electrodes and contacting said channel region along said etched surfaces; wherein said plurality of gate trenches and said plurality of source trenches are arranged in a cellular design and wherein said insulated source electrodes are recessed to a depth below said source regions and contact said source contact below said source regions. - View Dependent Claims (2, 3)
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4. A power semiconductor device, comprising:
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a semiconductor body having a drift region of a first conductivity type; a channel region over said drift region; source regions over said channel region; a plurality of gate trenches extending to a first depth within said semiconductor body; a plurality of source trenches extending to a second depth within said semiconductor body and extending within said drift region, said second depth being greater than said first depth; an insulated gate electrode within each of said plurality of gate trenches; an insulated source electrode within each of said plurality of source trenches and extending within said drift region, each insulated source electrode being recessed below respective source regions and having a decreasing width as it extends within said drift region; and a source contact over an upper surface of said semiconductor body and contacting said source electrodes below said source regions. - View Dependent Claims (5, 6, 7)
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8. A power semiconductor device, comprising:
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a semiconductor body of a first conductivity type; a channel region of a second conductivity formed in said semiconductor body; source regions of said first conductivity over said channel region; a plurality of gate trenches within said semiconductor body; a plurality of source trenches within said semiconductor body, wherein said plurality of gate trenches and said plurality of source trenches extend substantially to the same depth within said semiconductor body; an insulated gate electrode within each of said plurality of gate trenches; a source electrode within each of said plurality of source trenches recessed below respective source regions; and a source metal contact in contact with said insulated source electrodes below said source regions. - View Dependent Claims (9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34)
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Specification