Multiple chips bonded to packaging structure with low noise and multiple selectable functions
First Claim
Patent Images
1. A chip package comprising:
- a circuit component;
a first chip connected to said circuit component, wherein said first chip has multiple first bit-width options, wherein said multiple first bit-width options comprise a x8 option;
multiple first metal bumps connecting said first chip to said circuit component, wherein said first chip is connected to said circuit component in a flip-chip assembly; and
a second chip connected to said circuit component, wherein said second chip has multiple second bit-width options.
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Abstract
A chip package for semiconductor chips is provided by the method of forming a chip package includes the steps of forming a printed circuit board with a window therethrough; forming semiconductor chip connections of one or more primary chips which overlie the window to the printed circuit board by solder connections, locating a suspended semiconductor chip within the window, and connecting the suspended semiconductor chip to one or more primary chips overlying the window in a chip-on-chip connection. A bypass capacitor is formed on the printed circuit board.
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Citations
14 Claims
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1. A chip package comprising:
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a circuit component; a first chip connected to said circuit component, wherein said first chip has multiple first bit-width options, wherein said multiple first bit-width options comprise a x8 option; multiple first metal bumps connecting said first chip to said circuit component, wherein said first chip is connected to said circuit component in a flip-chip assembly; and a second chip connected to said circuit component, wherein said second chip has multiple second bit-width options. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14)
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Specification