Non-volatile memory using multiple boosting modes for reduced program disturb

• US 7,468,911 B2
• Filed: 11/02/2006
• Issued: 12/23/2008
• Est. Priority Date: 11/02/2006
• Status: Active Grant

• Current Assignee: SanDisk Technologies LLC (Western Digital Corporation)
• Original Assignee: SanDisk Corporation (Western Digital Corporation)
• Inventors: Lutze, Jeffrey W., Dong, Yingda
• Primary Examiner(s): Ho; Hoai V
• Application Number:
  US11/555,856
• Publication Number:
  US 20080123426A1
• Time in Patent Office: 782 Days
• Field of Search: 365/185.17, 365/185.19, 365/185.28
• US Class Current: 365/185.17
• CPC Class Codes: G11C 16/3418 Disturbance prevention or evaluation; Refreshing of disturbed memory data

Abstract

A non-volatile storage system which reduces program disturb. Multiple boosting modes are implemented while programming non-volatile storage. For example, self-boosting, local self-boosting, erased area self-boosting and revised erased area self-boosting may be used. One or more switching criteria are used to determine when to switch to a different boosting mode. The boosting mode may be used to prevent program disturb in unselected NAND strings while storage elements are being programmed in selected NAND strings. By switching boosting modes, an optimal boosting mode can be used as conditions change. The boosting mode can be switched based on various criteria such as program pulse number, program pulse amplitude, program pass number, the position of a selected word line, whether coarse or fine programming is used, whether a storage element reaches a program condition and/or a number of program cycles of the non-volatile storage device.

Claims

1. A non-volatile storage system, comprising:

a set of non-volatile storage elements which is provided in a plurality of NAND strings;

a plurality of word lines in communication with set of non-volatile storage elements; and

one or more control circuits in communication with the set of non-volatile storage elements, the one or more control circuits;

(a) determine a set of voltages to be applied to unselected word lines of the plurality of word lines based on which boosting mode of multiple available boosting modes is currently selected by the one or more control circuits, and (b) program the set of non-volatile storage elements, including applying the set of voltages to the unselected word lines, the set of voltages boosts channel regions associated with unselected NAND strings of the plurality of NAND strings, and applying a program voltage to a selected word line of the plurality of word lines while the channel regions are boosted.

2. The non-volatile storage system of claim 1, wherein:

the one or more control circuits program the set of non-volatile storage elements word line-by-word line, and the multiple available boosting modes are different for different selected word lines so that the one or more control circuits apply different sets of voltages to unselected word lines of the plurality of word lines when the different selected word lines are programmed.

3. The non-volatile storage system of claim 1, wherein:

the one or more control circuits select the currently selected boosting mode based on a position of the selected word line among the plurality of word lines.

14. The non-volatile storage system of claim 1, wherein:

the one or more control circuits select the currently selected boosting mode based on a number of programming cycles experienced by the set of non-volatile storage elements.

15. The non-volatile storage system of claim 1, wherein:

the one or more control circuits program the set of non-volatile storage elements using at least first and second passes, and the one or more control circuits select the currently selected boosting mode based on whether the first or second pass is currently implemented.

16. The non-volatile storage system of claim 1, wherein:

the one or more control circuits program the set of non-volatile storage elements using a coarse programming phase followed by a fine programming phase, and the one or more control circuits select the currently selected boosting mode based on whether the coarse or fine programming phase is currently implemented.

17. The non-volatile storage system of claim 1, wherein:

the multiple available boosting modes include a first boosting mode which boosts the channel regions without isolating portions of the channel regions on a source-side of the selected word line from portions of the channel regions on a drain-side of the selected word line, and a second boosting mode which isolates portions of the channel regions on the source-side of the selected word line from portions of the channel regions on the drain-side of the selected word line.

18. The non-volatile storage system of claim 1, wherein:

the multiple available boosting modes include a first boosting mode which boosts the channel regions without isolating portions of the channel regions on a programmed side of the selected word line from portions of the channel regions on an erased side of the selected word line, and a second boosting mode which isolates portions of the channel regions on the programmed side of the selected word line from portions of the channel regions on the erased side of the selected word line.

4. A non-volatile storage system, comprising:

a set of non-volatile storage elements;

a plurality of word lines in communication with the set of non-volatile storage elements, at least one storage element communicates with a selected word line of the plurality of word lines; and

one or more control circuits in communication with the set of non-volatile storage elements, the one or more control circuits program the at least one storage element by applying a pulse train to the selected word line during the programming, implement a first boosting mode for unselected non-volatile storage elements in the set of non-volatile storage elements when a first subset of program pulses in the pulse train is applied to the selected word line, and switch from implementing the first boosting mode to implementing a second boosting mode for the unselected non-volatile storage elements when a second subset of program pulses in the pulse train is applied to the selected word line.

5. The non-volatile storage system of claim 4, wherein:

the switching occurs based on when a program pulse of a specified amplitude in the pulse train is applied to the selected word line.

6. The non-volatile storage system of claim 4, wherein:

the switching occurs based on when a specified number of program pulses in the pulse train have been applied to the selected word line.

7. The non-volatile storage system of claim 4, wherein:

the switching occurs based on a position of the selected word line among the plurality of word lines.

8. The non-volatile storage system of claim 4, wherein:

the one or more control circuits implement the first boosting mode by applying a first set of voltages to unselected word lines of the plurality of word lines which are in communication with the unselected non-volatile storage elements, and implement the second boosting mode by applying a second set of voltages to the unselected word lines, the first set of voltages varying from the second set of voltages, at least in part.

9. The non-volatile storage system of claim 8, wherein:

the voltages in the second set are elevated relative to the voltages in the first set, at least in part.

10. The non-volatile storage system of claim 4, wherein:

the set of non-volatile storage elements is provided in a plurality of NAND strings, including a selected NAND string in which the at least one storage element is provided, and an unselected NAND string, the first and second boosting modes boost a channel of the unselected NAND string.

11. The non-volatile storage system of claim 10, wherein:

the one or more control circuits implement the first boosting mode by boosting the channel without isolating a portion of the channel on a source-side of the selected word line from a portion of the channel on a drain-side of the selected word line; and

the one or more control circuits implement the second boosting mode by isolating the portion of the channel on the source-side of the selected word line from the portion of the channel on the drain-side of the selected word line.

12. The non-volatile storage system of claim 10, wherein:

the one or more control circuits implement the first boosting mode by boosting the channel without isolating a portion of the channel on a programmed side of the selected word line from a portion of the channel on an erased side of the selected word line; and

the one or more control circuits implement the second boosting mode by isolating the portion of the channel on the programmed side of the selected word line from the portion of the channel on the erased side of the selected word line.

13. The non-volatile storage system of claim 4, wherein:

the one or more control circuits switch from implementing the first boosting mode to implementing the second boosting mode based on when at least one other storage element in the set of non-volatile storage elements reaches a specified programming condition, the at least one other storage element is programmed by the pulse train.