Phase-locked loop for stably adjusting frequency-band of voltage-controlled oscillator and phase locking method
First Claim
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1. A phase-locked loop comprising:
- a basic phase-locked loop circuit comprising a voltage-controlled oscillator (VCO), the basic phase-locked loop circuit generating an output clock signal which is phase-locked with an input clock signal using the VCO which oscillates in response to an oscillation control signal and changes an oscillation frequency band depending on a frequency band selection digital value; and
a frequency band controller which generates the frequency band selection digital value in response to the input clock signal and the oscillation control signal,wherein the frequency band controller comprises;
a comparator which compares the oscillation control signal with a first reference voltage to generate an up-count signal, and compares the oscillation control signal with a second reference voltage to generate a down-count signal;
a stabilization controller which generates an enable signal to update an operating frequency region of the VCO in response to the input clock signal and the oscillation control signal; and
a counter which receives the up-count signal and the down-count signal from the comparator, selectively outputs the up-count signal in response to the enable signal so as to increment the frequency band selection digital value, and selectively outputs the down-count signal in response to the enable signal so as to decrement the frequency band selection digital value.
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Abstract
A phase-locked loop (PLL) for stably adjusting a frequency band of a voltage-controlled oscillator and a phase locking method. In the PLL, a frequency band controller alters the frequency band selection digital value in response to an input clock signal and an oscillation control signal generated from an LPF of a basic PLL circuit, and thus a voltage-controlled oscillator of the basic PLL circuit alters the frequency of an output clock signal in response to the oscillation control signal and the frequency band selection digital value. The output clock signal is rapidly and stably phase-locked at a target frequency depending on the frequency band selection digital value.
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Citations
16 Claims
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1. A phase-locked loop comprising:
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a basic phase-locked loop circuit comprising a voltage-controlled oscillator (VCO), the basic phase-locked loop circuit generating an output clock signal which is phase-locked with an input clock signal using the VCO which oscillates in response to an oscillation control signal and changes an oscillation frequency band depending on a frequency band selection digital value; and a frequency band controller which generates the frequency band selection digital value in response to the input clock signal and the oscillation control signal, wherein the frequency band controller comprises; a comparator which compares the oscillation control signal with a first reference voltage to generate an up-count signal, and compares the oscillation control signal with a second reference voltage to generate a down-count signal; a stabilization controller which generates an enable signal to update an operating frequency region of the VCO in response to the input clock signal and the oscillation control signal; and a counter which receives the up-count signal and the down-count signal from the comparator, selectively outputs the up-count signal in response to the enable signal so as to increment the frequency band selection digital value, and selectively outputs the down-count signal in response to the enable signal so as to decrement the frequency band selection digital value. - View Dependent Claims (2, 3, 4, 5, 6)
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7. A phase-locked loop of comprising:
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a basic phase-locked loop circuit comprising a voltage-controlled oscillator (VCO), the basic phase-locked loop circuit generating an output clock signal which is phase-locked with an input clock signal using the VCO which oscillates in response to an oscillation control signal and changes an oscillation frequency band depending on a frequency band selection digital value; and a frequency band controller which generates the frequency band selection digital value in response to the input clock signal and the oscillation control signal, wherein the frequency band controller comprises; a comparator which compares the oscillation control signal and a first reference voltage to generate an up-count signal, and compares the oscillation control signal and a second reference voltage to generate a down-count signal; a stabilization controller which selectively outputs a part of the up-count signal and selectively outputs a part of the down-count signal depending on at least one critical time period generated on a basis of the input clock signal; and a counter which increments the frequency band selection digital value in response to the output up-count signal and decrements the frequency band selection digital value in response to the output down-count signal. - View Dependent Claims (8, 9)
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10. A method of phase-locking an input clock signal using a voltage-controlled oscillator (VCO) which is operated in response to an oscillation control signal and a frequency band selection digital value, the method comprising:
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receiving the input clock signal; processing, using the VCO, the input clock signal and an output clock signal which is fed back from the VCO to generate the oscillation control signal; deciding the frequency band selection digital value in response to the input clock signal and the oscillation control signal; and changing an oscillation frequency band of the VCO depending on the decided frequency band selection digital value to thereby generate the output clock signal having a frequency which is phase-locked at a certain target frequency, wherein the deciding the frequency band selection digital value comprises; comparing the oscillation control signal and a first reference voltage to generate an up-count signal, and comparing the oscillation control signal and a second reference voltage to generate a down-count signal; generating an enable signal to update an operating frequency region of the VCO in response to the input clock signal and the oscillation control signal; and selectively outputting the up-count signal in response to the enable signal so as to increment the frequency band selection digital value in response to the output up-count signal; and selectively outputting the down-count signal in response to the enable signal so as to decrement the frequency band selection digital value in response to the output down-count signal. - View Dependent Claims (11, 12, 13)
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14. A method of phase-locking an input clock signal using a voltage-controlled oscillator (VCO) which is operated in response to an oscillation control signal and a frequency band selection digital value, the method comprising:
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receiving the input clock signal; processing, using the VCO, the input clock signal and an output clock signal which is fed back from the VCO to generate the oscillation control signal; deciding the frequency band selection digital value in response to the input clock signal and the oscillation control signal; and changing an oscillation frequency band of the VCO depending on the decided frequency band selection digital value to thereby generate the output clock signal having a frequency which is phase-locked at a certain target frequency, wherein the deciding the frequency band selection digital value comprises; comparing the oscillation control signal and a first reference voltage to generate an up-count signal, and comparing the oscillation control signal and a second reference voltage to generate a down-count signal; selectively outputting a part of the up-count signal and selectively outputting a part of the down-count signal depending on at least one critical time period generated on a basis of the input clock signal; incrementing the frequency band selection digital value in response to the output up-count signal; and decrementing the frequency band selection digital value in response to the output down-count signal. - View Dependent Claims (15)
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16. A computer readable recording medium storing a program for realizing a method of phase-locking an input clock signal using a voltage-controlled oscillator (VCO) which is operated in response to an oscillation control signal and a frequency band selection digital value, the method comprising:
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receiving the input clock signal; processing, using the VCO, the input clock signal and an output clock signal which is fed back from the VCO to generate the oscillation control signal; deciding the frequency band selection digital value in response to the input clock signal and the oscillation control signal; and changing an oscillation frequency band of the VCO depending on the decided frequency band selection digital value to thereby generate the output clock signal having a frequency which is phase-locked at a certain target frequency, wherein the deciding the frequency band selection digital value comprises; comparing the oscillation control signal and a first reference voltage to generate an up-count signal, and comparing the oscillation control signal and a second reference voltage to generate a down-count signal; selectively outputting a part of the up-count signal and selectively outputting a part of the down-count signal depending on at least one critical time period generated on a basis of the input clock signal; incrementing the frequency band selection digital value in response to the output up-count signal; and decrementing the frequency band selection digital value in response to the output down-count signal.
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Specification