Sharing operational amplifier between two stages of pipelined ADC and/or two channels of signal processing circuitry
First Claim
1. A method of operating a pipelined analog-to-digital converter comprising first and second stages sharing an amplifier, said method comprises:
- performing a first discharge operation at the amplifier in response to a first reset pulse during a first period in which the first and second stages change operations, wherein the first period occurs after a first clock signal is used to cause the first stage to perform a first operation and the second stage to perform a second operation, but before a second clock signal is used to cause the first stage to perform the second operation and the second stage to perform the first operation; and
performing a second discharge operation at the amplifier during a second period in which the first and second stages change operations,wherein the second period occurs after the second clock signal is used to cause the first stage to perform the second operation and the second stage to perform the first operation.
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Accused Products
Abstract
A mechanism for discharging parasitic capacitance at an input of an operational amplifier, which is shared between two stages of a pipelined analog-to-digital converter and/or two channels of signal processing circuitry, before the amplifier configuration of the stages/channels is switched. The discharging act occurs when a short reset pulse is generated between two clock phases. The short reset pulse is applied to a switch connected to the operational amplifier input. When the reset pulse closes the switch, a discharge path is created and any parasitic capacitance at the operational amplifier input is discharged through the path. The discharging of the parasitic capacitance substantially mitigates the memory effect and the problems associated with the memory effect.
33 Citations
16 Claims
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1. A method of operating a pipelined analog-to-digital converter comprising first and second stages sharing an amplifier, said method comprises:
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performing a first discharge operation at the amplifier in response to a first reset pulse during a first period in which the first and second stages change operations, wherein the first period occurs after a first clock signal is used to cause the first stage to perform a first operation and the second stage to perform a second operation, but before a second clock signal is used to cause the first stage to perform the second operation and the second stage to perform the first operation; and performing a second discharge operation at the amplifier during a second period in which the first and second stages change operations, wherein the second period occurs after the second clock signal is used to cause the first stage to perform the second operation and the second stage to perform the first operation.
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2. An imager comprising:
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a pixel array; sample and hold circuitry coupled to receive analog signals from pixels within the array; an amplification circuit for amplifying the analog signals; and a pipelined analog-to-digital converter connected to receive and convert the amplified analog signals to digital signals, said converter comprising; first and second pipeline stages and a discharge circuit, the first and second pipeline stages are adapted to be switchably connected to an amplifier in response to first and second clock signals, the discharge circuit causing a discharge operation to occur at an input of the amplifier in response to a reset pulse during a first period after the first clock signal, but before the second clock signal, in which the connections between the first and second pipeline stages and the amplifier switch, the discharge circuit causing another discharge operation to occur at the input of the amplifier in response to another reset pulse during a second period after the second clock signal, but before the first clock signal, in which the connections between the first and second pipeline stages and the amplifier switch. - View Dependent Claims (3, 4, 5, 6, 7, 8, 9)
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10. An imager comprising:
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a pixel array; a first signal processing channel coupled to receive first analog signals from pixels within the array; a second signal processing channel coupled to receive second analog signals from pixels within the array; amplifier adapted to be switchably connected between the first and second channels; and a discharge circuit adapted to be switchably connected to an input of the amplifier, the discharge circuit causing a discharge operation to occur at an input of the amplifier during a period in which the connections between the first and second channels and the amplifier switch, the discharge circuit comprising a switch coupled between a ground potential and the input of the amplifier, wherein the switch is adapted to receive a reset pulse and connect the input of the amplifier to the ground potential in response to the reset pulse. - View Dependent Claims (11, 12, 13, 14, 15, 16)
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Specification