Arithmetic unit for approximating function

• US 7,472,149 B2
• Filed: 08/25/2004
• Issued: 12/30/2008
• Est. Priority Date: 01/21/2004
• Status: Expired due to Fees

• Current Assignee: Kabushiki Kaisha Toshiba (Toshiba Corporation)
• Original Assignee: Kabushiki Kaisha Toshiba (Toshiba Corporation)
• Inventors: Endo, Yukio
• Primary Examiner(s): Do; Chat C
• Application Number:
  US10/924,981
• Publication Number:
  US 20050160129A1
• Time in Patent Office: 1,588 Days
• Field of Search: 708270-277, 708/200
• US Class Current: 708/270
• CPC Class Codes: G06F 7/544 for evaluating functions by calculation G06F7/4824 takes precedence

Abstract

A look-up table outputs an initial value, an inclination of a straight line and a correction value in response to an entry-of a high-order bit string of an operand. An offset circuit calculates an offset of the low-order bit string. A correction circuit outputs the initial value obtained by adding the correction value to at least one of the initial value and the inclination when the correction is necessary. A multiplier calculates a product of the inclination and the offset. An adder calculates the sum of the initial value and the product.

Claims

1. An arithmetic unit for approximating a function, comprising:

a look-up table including a circuit configured to be connected to a register and output an initial value, an inclination of a straight line and at least one of relative correction values for the initial value and the inclination in response to an entry of a high-order bit string, an operand from the register being divided into the high-order bit string and a low-order bit string, a domain of the function of the operand being divided into a plurality of segments associated with the high-order bit string, the function being approximated by the straight line indicating a value equal to the initial value at a reference value in one of the segments;

an offset circuit configured to calculate an offset of the low-order bit string from the reference value;

a determination circuit configured to determine whether a correction of the straight line is necessary by using high-order bits in the low-order bit string;

a correction circuit configured to output the inclination obtained by adding an absolute correction value based on the relative correction values to at least one of the initial value and the inclination or by subtracting the absolute correction value from at least one of the initial value and the inclination, when the correction is necessary;

a multiplier configured to calculate a product of the inclination and the offset; and

an adder configured to calculate the sum of the initial value and the product and output the sum to the register,

wherein the correction circuit comprises;

an adder-subtractor configured to output a corrected inclination obtained by adding the absolute correction value to the inclination or subtracting the absolute correction value from the inclination; and

a selector configured to select the corrected inclination when correction is necessary, whereby the size of the look-up table circuit is kept small.

2. The arithmetic unit of claim 1, wherein the look-up table comprises:

an initial value look-up table associated with the high-order bit string and configured to output the initial value;

an inclination look-up table associated with the high-order bit string and configured to output the inclination; and

a first correction look-up table associated with the high-order bit string and configured to output the relative correction value of one of the initial value and the inclination.

3. The arithmetic unit of claim 2, wherein the first correction look-up table outputs a relative correction value associated with only a part of the high-order bits in the high-order bit string.

4. The arithmetic unit of claim 2, wherein the look-up table further comprises a second correction look-up table associated with the high-order bit string and configured to output the relative correction value of the other one of the initial value and the inclination.

5. The arithmetic unit of claim 1, wherein the correction circuit comprises:

an adder-subtractor configured to output a corrected initial value obtained by adding the absolute correction value to the initial value or subtracting the absolute correction value from the initial value; and

a selector configured to select the corrected initial value when correction is necessary.

6. The arithmetic unit of claim 5, wherein the determination circuit comprises an addition-subtraction determination circuit determining whether the adder-subtractor adds or subtracts the absolute correction value by using the high-order bits.

7. The arithmetic unit of claim 1, wherein the reference value corresponds to the center of the one of the segments, the segment being divided by the reference value into halves, and the determination circuit determines that correction is necessary only when the most significant bit of the high-order bits corresponds to one of the divided halves.

8. The arithmetic unit of claim 1, wherein the segment is divided into a plurality of regions corresponding to the high-order bits, and the determination circuit determines whether correction for each region is necessary.

9. The arithmetic unit of claim 8, wherein the correction circuit comprises an addition-subtraction determination circuit determining whether to add or subtract the absolute correction value to or from the initial value by using the high-order bits.

10. The arithmetic unit of claim 9, wherein the addition-subtraction determination circuit determines whether either addition or subtraction is carried out by using an inverted value of a value obtained by an exclusive OR operation of the most significant bit and the second high-order bit of the high-order bits.

11. The arithmetic unit of claim 8, wherein the determination circuit determines whether correction is necessary by using an inverted value of a value obtained by an exclusive OR operation of an upper second bit and the upper third bit of the high-order bits.

12. An arithmetic unit for approximating a function, comprising:

a look-up table including a circuit configured to be connected to a register and output an initial value, an inclination of a straight line and a relative correction value for the initial value in response to an entry of a high-order bit string, an operand from the register being divided into the high-order bit string and a low-order bit string, a domain of the function of the operand being divided into a plurality of segments associated with the high-order bit string, the function being approximated by the straight line indicating a value equal to the initial value at a reference value in one of the segments;

an offset circuit configured to calculate an offset of the low-order bit string from the reference value;

a determination circuit configured to determine whether a correction of the straight line is necessary by using the high-order bits in the low-order bit string;

a correction circuit configured to output the inclination obtained by adding an absolute correction value based on the relative correction values to the initial value or by subtracting the absolute correction value from the initial value, when the correction is necessary;

a multiplier configured to calculate a product of the inclination and the offset; and

an adder configured to calculate the sum of the initial value and the product and output the sum to the register,

wherein the absolute correction value is obtained by shifting the offset by the relative correction value as a shift amount, and

wherein the correction circuit comprises;

a shifter configured to generate the absolute correction value in conformity with the shift amount; and

an adder-subtractor configured to output a corrected initial value obtained by adding or subtracting the absolute correction value to or from the initial value, whereby the size of the look-up table circuit is kept small.

13. The arithmetic unit of claim 12, wherein the relative correction value is equal to the absolute correction value.

14. The arithmetic unit of claim 12, wherein the correction circuit further comprises a selector selecting one of the offset, an inverted value of the offset, and zero in conformity with the output from the determination circuit, the shifter shifts the selected offset or the inverted value of the offset in conformity with the shift amount.

15. An arithmetic unit for approximating a function, comprising:

a look-up table including a circuit configured to be connected to a register and output an initial value, an inclination of a straight line and a correction value for the inclination in response to an entry of a high-order bit string, an operand from the register being divided into the high-order bit string and a low-order bit string, a domain of the function of the operand being divided into a plurality of segments associated with the high-order bit string, the function being approximated by the straight line indicating a value equal to the initial value at a reference value in one of the segments;

an offset circuit configured to calculate an offset of the low-order bit string from the reference value;

a determination circuit configured to determine whether a correction of the straight line is necessary by using high-order bits in the low-order bit string;

a correction circuit configured to output the inclination obtained by adding the correction value to the inclination or by subtracting the correction value from the inclination, when the correction is necessary;

a multiplier calculating a product of the inclination and the offset; and

an adder calculating the sum of the initial value and the product and output the sum to the register,

wherein the correction circuit comprises;

an adder-subtractor configured to output a corrected inclination obtained by adding the correction value to the inclination or subtracting the correction value from the inclination; and

a selector configured to select the corrected inclination when correction is necessary, whereby the size of the look-up table circuit is kept small.