Interface circuit system and method for performing power management operations utilizing power management signals
DCFirst Claim
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1. A sub-system, comprising:
- an interface circuit in communication with a plurality of memory circuits and a system, the interface circuit operable to interface the memory circuits and the system for communicating a first number of power management signals to at least a portion of the memory circuits that is different from a second number of power management signals received from the system;
wherein the interface circuit is further operable for simulating at least one virtual memory circuit.
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Abstract
A memory circuit power management system and method are provided. In use, an interface circuit is in communication with a plurality of memory circuits and a system. The interface circuit is operable to interface the memory circuits and the system for communicating a first number of power management signals to at least a portion of the memory circuits that is different from a second number of power management signals received from the system.
381 Citations
18 Claims
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1. A sub-system, comprising:
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an interface circuit in communication with a plurality of memory circuits and a system, the interface circuit operable to interface the memory circuits and the system for communicating a first number of power management signals to at least a portion of the memory circuits that is different from a second number of power management signals received from the system; wherein the interface circuit is further operable for simulating at least one virtual memory circuit. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 18)
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16. A method, comprising:
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interfacing a plurality of memory circuits and a system; receiving at least one power management signal from the system; communicating a different number of power management signals to at least a portion of the memory circuits; and simulating at least one virtual memory circuit utilizing an interface circuit.
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17. A system, comprising:
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a plurality of memory circuits; and an interface circuit in communication with the memory circuits and a system, the interface circuit operable to interface the memory circuits and the system for communicating a first number of power management signals to at least a portion of the memory circuits that is different from a second number of power management signals received from the systems; wherein the interface circuit is further operable for simulating at least one virtual memory circuit.
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Specification