Processor timing apparatus, systems, and methods

• US 7,472,306 B2
• Filed: 05/18/2004
• Issued: 12/30/2008
• Est. Priority Date: 05/18/2004
• Status: Expired due to Fees

• Current Assignee: Intel Corporation
• Original Assignee: Intel Corporation
• Inventors: Chen, Inching, Tsui, Ernest
• Primary Examiner(s): Du; Thuan N.
• Assistant Examiner(s): Rahman; Fahmida
• Application Number:
  US10/848,479
• Publication Number:
  US 20050262370A1
• Time in Patent Office: 1,687 Days
• Field of Search: 713/300, 713/375, 713/400, 713/401, 713/500, 713/600
• US Class Current: 713/600
• CPC Class Codes: G06F 1/3203 Power management, i.e. event-based initiation of a power-saving mode

Abstract

An apparatus and a system, as well as a method and article, may operate to independently adjust a plurality of processor clocks coupled to a corresponding plurality of networked processors responsive to one or more status indicators to provide scalable performance and power consumption. The status indicators may indicate the status of routers coupled to the processors. Additional apparatus, systems, and methods are disclosed.

Claims

1. A method, including:

independently adjusting a plurality of processor clocks coupled to a corresponding plurality of networked processors responsive to at least one status indicator, wherein at least two status indicators, including the at least one status indicator, independently indicate a status of at least two routers coupled to the corresponding plurality of networked processors; and

independently adjusting a speed of at least one of the plurality of processor clocks to balance a processor workload measurement imbalance indicated by the at least one status indicator and a second status indicator, wherein the second status indicator is different than the at least two status indicators.

2. The method of claim 1, wherein a third status indicator included in the at least one status indicator is independently associated with a progress level of at least one of the corresponding plurality of networked processors.

3. The method of claim 1, further including:

adjusting a packet length responsive to a progress level of at least one of the corresponding plurality of networked processors.

4. The method of claim 1, further including:

adjusting a sample block size responsive to a progress level of at least one of the corresponding plurality of networked processors.

5. The method of claim 1, wherein a third status indicator included in the at least one status indicator independently indicates a status of at least one buffer independently associated with at least one of the corresponding plurality of networked processors.

6. The method of claim 5, wherein the status is selected from at least one of a buffer fill amount, a buffer fill rate, and a buffer fill acceleration.

7. The method of claim 1, further including:

synchronously clocking a plurality of routers, including the at least two routers, coupled to the corresponding plurality of networked processors.

8. The method of claim 7, further including:

adjusting a synchronous clocking speed of the plurality of routers coupled to the corresponding plurality of networked processors.

9. The method of claim 1, further including:

statically determining at least two different speeds for at least some of the plurality of processor clocks at substantially a time of compilation for a program to be commonly executed by the corresponding plurality of networked processors.

10. An article including a machine-accessible medium storing associated information, wherein the information, when accessed, results in a machine performing:

independently adjusting a plurality of processor clocks coupled to a corresponding plurality of networked processors responsive to at least one status indicator, wherein at least two status indicators, including the at least one status indicator, independently indicate a status of at least two routers coupled to the corresponding plurality of networked processors; and

independently adjusting a speed of at least one of the plurality of processor clocks to balance a processor workload measurement imbalance indicated by the at least one status indicator and a second status indicator, wherein the second status indicator is different than the at least two status indicators.

11. The article of claim 10, wherein a third status indicator included in the at least one status indicator independently indicates a status of at least one buffer independently associated with one of the corresponding plurality of networked processors.

12. The article of claim 11, wherein the status is selected from at least one of a sampling rate and a change in the sampling rate.

13. The article of claim 10, wherein the information, when accessed, results in the machine performing:

independently adjusting a speed of at least one of the plurality of processor clocks to change at least one of a buffer fill amount, a buffer fill rate, and a buffer fill acceleration.

14. The article of claim 10, wherein the information, when accessed, results in the machine performing;

independently adjusting a speed of at least one of the plurality of processor clocks to compensate for at least one of a forecasted workload and a forecasted network traffic loading.

15. An apparatus, including:

an adjustment module comprising hardware circuitry to independently adjust a plurality of processor clocks coupled to a corresponding plurality of networked processors responsive to at least one status indicator, and to independently adjust a speed of at least one of the plurality of processor clocks to balance a processor workload measurement imbalance indicated by the at least one status indicator and a second status indicator, wherein at least two status indicators, including the at least one status indicator, independently indicate a status of at least two routers coupled to the corresponding plurality of networked processors, and wherein the second status indicator is different than the at least two status indicators.

16. The apparatus of claim 15, further including:

a host processor included in the adjustment module.

17. The apparatus of claim 15, further including:

the at least one status indicator coupled to at least one of the corresponding plurality of networked processors.

18. The apparatus of claim 15, further including:

two buffers independently coupled to at least two buffer status indicators capable of communicating with the adjustment module, the at least two buffer status indicators to indicate at least one of a buffer fill status, a buffer fill velocity, and a buffer fill acceleration.

19. The apparatus of claim 15, further including:

a plurality of synchronously-clocked routers, including the at least two routers, coupled to the corresponding plurality of networked processors.

20. A system, including:

a plurality of networked processors coupled to a corresponding plurality of independently adjustable clocks having a frequency to be adjusted responsive to at least one stats indicator, wherein a speed of at least one of the plurality of processor clocks is independently adjustable to balance a processor workload measurement imbalance indicated by the at least one status indicator and a second status indicator, and wherein at least two status indicators, including the at least one status indicator, independently indicate a status of at least two routers coupled to the corresponding plurality of networked processors; and

an energy conduit coupled to at least one of the plurality of networked processors, wherein the second status indicator is different than the at least two status indicators.

21. The system of claim 20, wherein a speed for at least some of the plurality of processor clocks is statically determined at substantially a time of compilation for a program to be commonly executed by the corresponding plurality of networked processors, wherein a first processor and a second processor are included in the corresponding plurality of networked processors, and wherein a first determined speed for the first processor is different from a second determined speed for the second processor.

22. The system of claim 20, wherein at least two traffic status indicators capable of communicating with an adjustment module are to indicate a first network traffic loading and a second network traffic loading associated with a network coupled to the plurality of networked processors.

23. The system of claim 20, wherein the energy conduit is selected from one of an omnidirectional antenna and an infra-red transceiver.