Test apparatus for mixed-signal semiconductor device
First Claim
1. A test apparatus for testing mixed-signal semiconductor devices under test (DUTs) that include an analog function block and a digital function block, the test apparatus comprising:
- a tester module including a plurality of event tester boards, the event tester boards including analog signal tester boards and digital signal tester boards;
a test head to receive the tester module;
a performance board that includes a plurality of sockets for the DUTs;
a test fixture including connection means, the connection means electrically connecting the performance board and the tester module to the DUTs and to the event tester boards;
a test controller for controlling an overall operation of the test apparatus; and
a switching parallel connection circuit for sequentially connecting each one of the event tester boards with a plurality of the DUTs.
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Accused Products
Abstract
A test apparatus for a mixed-signal semiconductor device that includes a plurality of event tester modules including analog and digital signal tester boards, a test head for event tester modules, a performance board including a socket for a DUT, a test fixture including a connection means, an option circuit for when the DUT is a mixed-signal integrated circuit including an analog and digital function blocks, a tester controller controlling the overall operation, and a switching parallel connection circuit sequentially connecting a single event tester board with a plurality of the DUTs. The event tester board and the DUTs are connected by a group unit. The number of parallel test is increased by an improved tester board or an improved performance board without the use of an extra event tester board for an analog signal test.
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Citations
17 Claims
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1. A test apparatus for testing mixed-signal semiconductor devices under test (DUTs) that include an analog function block and a digital function block, the test apparatus comprising:
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a tester module including a plurality of event tester boards, the event tester boards including analog signal tester boards and digital signal tester boards; a test head to receive the tester module; a performance board that includes a plurality of sockets for the DUTs; a test fixture including connection means, the connection means electrically connecting the performance board and the tester module to the DUTs and to the event tester boards; a test controller for controlling an overall operation of the test apparatus; and a switching parallel connection circuit for sequentially connecting each one of the event tester boards with a plurality of the DUTs. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 11, 12, 13)
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10. A test apparatus for testing mixed-signal semiconductor devices under test (DUTs) that include an analog function block and a digital function block, the test apparatus comprising:
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a tester module including a plurality of event tester boards, the plurality of event tester boards including analog signal tester boards and digital signal tester boards; a performance board that includes a plurality of sockets for the DUTs; a test fixture including connection means, the connection means electrically connecting the performance board and the tester module to the DUTs and to the event tester boards; a test controller for controlling an overall operation of the test apparatus; and a switching parallel connection circuit for sequentially connecting each one of the event tester boards with a plurality of the DUTs. - View Dependent Claims (14)
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15. A test apparatus for testing a plurality of mixed-signal semiconductor devices under test (DUTs) that output analog signals and digital signals, the test apparatus comprising:
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event tester boards for testing the analog signals and for testing the digital signals; a performance board that includes a plurality of sockets to receive the DUTs; means for electrically connecting the performance board to the DUTs and to the event tester boards; parallel switching means for sequentially connecting each one of the event tester boards with some of the DUTs; and a tester controller for controlling the overall operation of the test apparatus. - View Dependent Claims (16, 17)
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Specification