Semiconductor device having dielectric film having aperture portion

• US 7,474,002 B2
• Filed: 10/17/2002
• Issued: 01/06/2009
• Est. Priority Date: 10/30/2001
• Status: Expired due to Fees

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Ishikawa, Akira
• Primary Examiner(s): Williams; Alexander O
• Application Number:
  US10/273,134
• Publication Number:
  US 20030080436A1
• Time in Patent Office: 2,273 Days
• Field of Search: 257/776, 257/E29.276, 257/E23.134, 257/E27.111, 257/E29.137, 257/E29.278, 257/E29.282, 257/E29.283, 257/59, 257/72, 257/306, 257308-311, 257/57, 257/774, 257/700, 257/701, 257/758, 257/759, 257/751, 257/68, 257/296, 257/350, 257/61, 257/71
• US Class Current: 257/776
• CPC Class Codes: G02F 1/13454 Drivers integrated on the active matrix substrate G02F1/136277 takes precedence
• CPC Class Codes: G02F 1/136227 Through-hole connection of the pixel electrode to the active element through an insulation layer
• CPC Class Codes: H01L 23/3192 Multilayer coating
• CPC Class Codes: H01L 27/1218 with a particular composition or structure of the substrate
• CPC Class Codes: H01L 27/124 with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits wiring structures per se H01L23/52
• CPC Class Codes: H01L 27/1248 with a particular composition or shape of the interlayer dielectric specially adapted to the circuit arrangement
• CPC Class Codes: H01L 29/42384 for thin film field effect transistors, e.g. characterised by the thickness or the shape of the insulator or the dimensions, the shape or the lay-out of the conductor
• CPC Class Codes: H01L 29/66757 Lateral single gate single channel transistors with non-inverted structure, i.e. the channel layer is formed before the gate
• CPC Class Codes: H01L 29/66765 Lateral single gate single channel transistors with inverted structure, i.e. the channel layer is formed after the gate
• CPC Class Codes: H01L 29/78621 with LDD structure or an extension or an offset region or characterised by the doping profile
• CPC Class Codes: H01L 29/78633 with a light shield
• CPC Class Codes: H01L 29/78636 with supplementary region or layer for improving the flatness of the device
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
• CPC Class Codes: H01L 2924/09701 Low temperature co-fired ceramic [LTCC]
• CPC Class Codes: H01L 2924/12044 OLED
• CPC Class Codes: H01L 2924/19041 being a capacitor
• CPC Class Codes: H01L 2924/3025 Electromagnetic shielding

Abstract

In the semiconductor device having a structure in which a plurality of layers are built-up by layers made of different materials or layers including various formed patterns, it is an object to provide a method which smoothing surface can be achieved without a polishing treatment by CMP method or a smoothing process by depositing a SOG film, a substrate material is not chosen, and the smoothing is simple and easy. In the semiconductor device in which a plurality of different layers are formed, smoothing surface can be achieved without the polishing treatment by the CMP method or the smoothing process by depositing the SOG film to a dielectric film formed on a dielectric film and a wring (electrode) or a semiconductor layer in a manner that an aperture portion is formed in the dielectric film, the wring (electrode) or the semiconductor layer is formed in the aperture portion.

Claims

1. A semiconductor device comprising:

a first dielectric film having an aperture portion,

a semiconductor layer formed in the aperture portion, and

a second dielectric film over the first dielectric film and the semiconductor layer,

wherein the second dielectric film contacts an upper surface outside the aperture portion of the first dielectric film and extends into the aperture portion to contact an inner side surface of the first dielectric film and a side surface of the semiconductor layer.

26. The semiconductor device according to claim 1,

wherein a depth of said aperture portion is equal to a thickness of said semiconductor layer.

2. A semiconductor device comprising:

a first dielectric film having an aperture portion,

a wiring formed continuously from a bottom surface of the aperture portion to a first upper surface outside the aperture portion of the first dielectric film, and

a second dielectric layer coating over the first dielectric layer and the wiring,

wherein, in the second dielectric layer, a contact hole reached to the wiring is formed at a position where the wiring is formed on the first upper surface,

wherein a depth of said aperture portion is shorter than a thickness of said first dielectric film, and

wherein the second dielectric film contacts a second upper surface outside the aperture portion of the first dielectric film.

23. The semiconductor device according to claim 2,

wherein a depth of said aperture portion is equal to a thickness of said wiring.

3. A semiconductor device comprising:

a first dielectric film having a first aperture portion,

a wiring formed continuously from a bottom surface of the first aperture portion to a first upper surface outside the aperture portion of the first dielectric film, and

a second dielectric film coating over the first dielectric layer and the wiring and having a second aperture portion,

wherein at least a part of the second aperture portion is formed on an upper portion of a position where the wiring is formed on the first upper surface, and a contact hole reached to the wiring is formed corresponding to the position of a bottom surface of the second aperture portion, and

wherein the second dielectric film contacts a second upper surface outside the aperture portion of the first dielectric film.

4. A semiconductor device according to claim 3,

wherein a value of a depth of said first aperture portion is equal to a value of a thickness of said wiring.

5. A semiconductor device comprising:

a first dielectric film having a first aperture portion and a second aperture portion adjacent to the first aperture portion;

a wiring formed continuously from a bottom surface of the first aperture portion to a bottom surface of the second aperture portion through a first upper surface of the first dielectric film between the first aperture portion and the second aperture portion; and

a second dielectric film over the first dielectric film and the wiring,

wherein the second dielectric film contacts a second upper surface outside the first aperture portion and the second aperture portion of the first dielectric film and extends into the first aperture portion and the second aperture portion to contact an inner side surface of the first dielectric film and a side surface of the wiring.

6. A semiconductor device according to claim 5, wherein a value of a depth of said first aperture portion and said second aperture portion is equal to a value of a thickness of said wiring.

7. A semiconductor device comprising:

a first dielectric film having a first aperture portion and a second aperture portion adjacent to the first aperture portion,

a wiring formed continuously from a bottom surface of the first aperture portion to a bottom surface of the second aperture portion through a first upper surface of the first dielectric film between the first aperture portion and the second aperture portion, and

a second dielectric film coating over the first dielectric layer and the wiring,

wherein, in the second dielectric layer, a contact hole reached to the wiring is formed at a position where the wiring is formed on the first upper surface of the first dielectric film between the first aperture portion and the second aperture portion, and

wherein the second dielectric film contacts a second upper surface outside the first aperture portion and the seond aperture portion of the first dielectric film.

8. A semiconductor device according to claim 7, wherein a value of a depth of said first aperture portion and said second aperture portion is equal to a value of a thickness of said wiring.

9. A semiconductor device comprising:

a first dielectric film having a first aperture portion and a second aperture portion adjacent to the first aperture portion,

a wiring formed continuously from a bottom surface of the first aperture portion to a bottom surface of the second aperture portion through a first upper surface of the first dielectric film between the first aperture portion and the second aperture portion, and

a second dielectric film coating over the first dielectric layer and the wiring and having a third aperture portion,

wherein at least a part of the third aperture portion is formed on an upper portion of a position where the wiring is formed on the first upper surface of the second dielectric film between the first aperture portion and the second aperture portion, and a contact hole reached to the wiring is formed corresponding to the position of a bottom surface of the third aperture portion, and

wherein the second dielectric film contacts a secod upper surface outside the first aperture portion and the second aperture portion of the first dielectric film.

10. A semiconductor device according to claim 9, wherein a value of a depth of said first aperture portion and said second aperture portion is equal to a value of a thickness of said wiring.

11. A semiconductor device comprising:

a first dielectric film having an aperture portion which is formed with the first dielectric film remained in an island shape inside the aperture portion;

a wiring formed continuously inside the aperture portion and on an upper portion of the first dielectric film remained in the island shape; and

a second dielectric film over the first dielectric film and the wiring,

wherein the second dielectric film contacts an upper surface outside the aperture portion of the first dielectric film and extends into the aperture portion to contact an inner side surface of the first dielectric film and a side surface of the wiring.

12. A semiconductor device according to claim 11, wherein a value of a depth of said aperture portion is equal to a value of a thickness of said wiring.

13. A semiconductor device comprising:

a first dielectric film having an aperture portion which is formed with the first dielectric film remained in an island shape inside the aperture portion,

a wiring formed continuously inside the aperture portion and on an upper portion of the first dielectric film remained in the island shape, and

a second dielectric film coating over the first dielectric film and the wiring,

wherein, in the second dielectric film, a contact hole reached to the wiring is formed at a position where the dielectric film remained in the island shape is formed, and

wherein the second dielectric film contacts an upper surface outside the aperture portion of the first dielectric film.

14. A semiconductor device according to claim 13, wherein a value of a depth of said aperture portion is equal to a value of a thickness of said wiring.

15. A semiconductor device comprising:

a first dielectric film having a first aperture portion which is formed with the first dielectric film remained in an island shape inside the aperture portion,

a wiring formed continuously inside the first aperture portion and on an upper portion of the first dielectric film remained in the island shape, and

a second dielectric film coating over the first dielectric film and the wiring and having a second aperture portion,

wherein at least a part of the second aperture portion is formed on an upper portion of a position where the wiring is formed on the upper portion of the first dielectric film remained in the island shape, and a contact hole reached to the wiring is formed corresponding to the position of a bottom surface of the second aperture portion, and

wherein the second dielectric film contacts an upper surface outside the first aperture portion of the first dielectric film.

16. A semiconductor device according to claim 15, wherein a value of a depth of said first aperture portion is equal to a value of a thickness of said wiring.

17. A semiconductor device according to claim 15, wherein a value of a depth of said first aperture portion and said second aperture portion is equal to a value of a thickness of said wiring.

18. A semiconductor device comprising:

a semiconductor film including a first impurity region and a second impurity region over an insulating surface;

a gate insulating film adjacent to said semiconductor film;

a gate electrode adjacent to said gate insulating film;

a first insulating film over said semiconductor film;

a second insulating film having a first aperture portion and a second aperture portion over said first insulating film, wherein a first projection is provided inside the first aperture portion;

a first wiring formed in said first aperture portion and covering said first projection, wherein said first wiring is electrically connected to the first impurity region;

a second wiring formed in said second aperture portion, wherein said second wiring is electrically connected to the second impurity region; and

a third insulating film over the first wiring, the second wiring and the second insulating film,

wherein the third insulating film contacts an upper surface outside the first aperture portion and the second aperture portion of the second insulating film.

19. The semiconductor device according to claim 18 further comprising:

a third insulating film having a third aperture portion and a fourth aperture portion over said first wiring and said second wring;

a third wiring formed in said third aperture portion; and

a fourth wiring formed in said fourth aperture portion;

wherein said third wiring is electrically connected to said first wiring through a contact hole.

20. The semiconductor device according to claim 19 further comprising:

a fourth insulating film is formed over said third wiring and said fourth wiring, wherein said fourth insulating film has a fifth aperture portion and a second projection inside said fifth aperture portion, and a sixth aperture portion and a third projection inside said sixth aperture portion;

a fifth wiring formed in said fifth aperture portion and covering said second projection; and

a sixth wiring formed in said sixth aperture portion and covering said third projection, wherein said sixth wiring is electrically connected to the fourth wiring through a contact hole.

21. The semiconductor device according to claim 20 further comprising:

a fifth insulating film having a seventh aperture portion and a eighth aperture portion formed over said fifth wiring and said sixth wiring;

a seventh wiring formed in said seventh aperture portion; and

a eighth wiring formed in said eighth aperture portion;

wherein said seventh wiring is electrically connected to said fifth wiring through a contact hole, and

wherein said eighth wiring is electrically connected to said sixth wiring through a contact hole.

24. The semiconductor device according to claim 18,

wherein a top surface of said first wiring is leveled with a top surface of said first dielectric film.

25. The semiconductor device according to claim 19,

wherein a value of depth of the third aperture portion, a value of depth of the fourth aperture portion, a value of thickness of the third wiring and a value of thickness of the forth wiring are equal.

28. The semiconductor device according to claim 18, wherein the first projection is extended from the first insulating film.

35. The semiconductor device according to claim 20, wherein a value of depth of the fifth aperture portion, a value of depth of the sixth aperture portion, a value of thickness of the fifth wiring and a value of thickness of the sixth wiring are equal.

22. A semiconductor device comprising:

a first dielectric film having an aperture portion,

a semiconductor layer formed in the aperture portion, and

a second dielectric film coating the first dielectric film and the semiconductor layer, wherein the second dielectric film contacts a top surface outside the aperture portion of the first dielectric film and extends into the aperture portion to contact an inner side surface of the first dielectric film and a side surface of the semiconductor layer,

wherein the semiconductor layer is formed so that a top surface of said semiconductor layer is leveled with the top surface outside the aperture portion of the first dielectric film.

27. The semiconductor device according to claim 22,

wherein a value of a depth of said aperture portion is equal to a value of a thickness of said semiconductor layer.

29. A semiconductor device comprising:

a first dielectric film having an aperture portion and a projection inside the aperture portion;

a first wiring formed in said aperture portion and covering said projection;

a second dielectric film formed over said first dielectric film and said first wiring, said second dielectric film having a contact hole;

a second wiring formed over said second dielectric film wherein said second wiring is electrically connected to said first wiring through said contact hole,

wherein the second dielectric film contacts an upper surface outside the aperture portion of the first dielectric film.

30. The semiconductor device according to claim 29, wherein said second wiring is in direct contact with a top surface of said first wiring, said top surface being located over said projection.

31. The semiconductor device according to claim 29, wherein a depth of said aperture portion is equal to a thickness of said first wiring.

32. A semiconductor device comprising:

a first dielectric film having a first aperture portion and a projection inside the first aperture portion;

a first wiring formed in said first aperture portion and covering said projection;

a second dielectric film formed over said first dielectric film and said first wiring, said second dielectric film having a second aperture portion and a contact hole in said second aperture portion;

a second wiring formed in said second aperture portion, wherein said second wiring is electrically connected to said first wiring through said contact hole,

wherein the second dielectric film contacts an upper surface outside the first aperture portion of the first dielectric film.

33. The semiconductor device according to claim 32, wherein said second wiring is in direct contact with a top surface of said first wiring, said top surface being located over said projection.

34. The semiconductor device according to claim 32, wherein a depth of said first aperture portion is equal to a thickness of said first wiring.