Method of manufacture for microelectromechanical devices

• US 7,476,327 B2
• Filed: 05/04/2004
• Issued: 01/13/2009
• Est. Priority Date: 05/04/2004
• Status: Expired due to Fees

• Current Assignee: Snaptrack Incorporated (Qualcomm, Inc.)
• Original Assignee: IDC, LLC
• Inventors: Chui, Clarence, Kothari, Manish, Tung, Ming-Hau, Gally, Brian James, Batey, John
• Primary Examiner(s): OLSEN, ALLAN W
• Application Number:
  US10/839,329
• Publication Number:
  US 20050249966A1
• Time in Patent Office: 1,715 Days
• Field of Search: None
• US Class Current: 216/2
• CPC Class Codes: B81B 3/0008 Structures for avoiding electrostatic attraction, e.g. avoiding charge accumulation
• CPC Class Codes: B81C 1/00579 Avoid charge built-up
• CPC Class Codes: Y10T 428/12542 More than one such component

Abstract

A method of manufacturing a microelectromechanical device includes forming at least two conductive layers on a substrate. An isolation layer is formed between the two conductive layers. The conductive layers are electrically coupled together and then the isolation layer is removed to form a gap between the conductive layers. The electrical coupling of the layers mitigates or eliminates the effects of electrostatic charge build up on the device during the removal process.

Claims

1. A method of manufacturing a microelectromechanical device, comprising:

forming at least a first and a second conductive layer on a substrate;

forming an isolation layer between the two conductive layers;

electrically coupling the conductive layers together using a solid conductor to provide electrical connection to the conductive layers;

removing the isolation layer to form a gap between the first conductive layer and the second conductive layer; and

electrically decoupling the conductive layers after removing the isolation layer.

2. The method of claim 1, further comprising forming a third conductive layer.

3. The method of claim 2, wherein forming an isolation layer further comprises forming two isolation layers.

4. The method of claim 1, wherein removing the isolation layer comprises performing an etch of the isolation layer.

5. The method of claim 4, wherein performing an etch comprises performing a dry gas etch.

6. The method of claim 5, wherein performing a dry gas etch comprises performing a xenon-difluorine etch.

7. The method of claim 1, wherein electrically coupling the conductive layers together comprises coupling the conductive layers together using an external coupling.

8. The method of claim 1, wherein electrically coupling comprises electrically coupling the conductive layers together during fabrication of at least a portion of the MEMS device.

9. The method of claim 1, wherein electrically coupling the conductive layers together comprises coupling the conductive layers together by forming one or more coupling connections over the substrate.

10. The method of claim 1, wherein electrically coupling the conductive layers together comprises using a conductive wire to provide electrical connection to the conductive layers.

11. The method of claim 1, wherein electrically coupling the conductive layers together comprises using a conductive wire to provide electrical connection to the conductive layers and then connecting the wire to a common voltage potential.

13. The method of claim 1, wherein electrically coupling the conductive layers together comprises electrically coupling the conductive layers together in an inactive area of the substrate.

14. The method of claim 1, wherein electrically decoupling the conductive layers comprises physically separating a conductive lead between the conductive layers.

12. The method of claim I, wherein electrically coupling the conductive layers together comprises using conductive wires for each conductive layer and electrically connecting all of the wires to the same potential.