MRAM cell structure and method of fabrication

• US 7,476,919 B2
• Filed: 05/05/2006
• Issued: 01/13/2009
• Est. Priority Date: 05/19/2004
• Status: Active Grant

• Current Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Original Assignee: Applied Spintronics, Inc., Headway Technologies Incorporated (TDK Corporation)
• Inventors: Zhong, Tom, Hong, Liubo, Yang, Lin
• Primary Examiner(s): Tran; Long K
• Application Number:
  US11/418,910
• Publication Number:
  US 20060209591A1
• Time in Patent Office: 984 Days
• Field of Search: 257/30, 257/295, 257/427, 257/421, 257/E21.665
• US Class Current: 257/295
• CPC Class Codes: G11C 11/16 using elements in which the storage effect is based on magnetic spin effect
• CPC Class Codes: H10B 61/00 Magnetic memory devices, e.g. magnetoresistive RAM [MRAM] devices
• CPC Class Codes: H10N 50/01 Manufacture or treatment

Abstract

An MRAM structure is disclosed where the distance from a bit line or word line to an underlying free layer in an MTJ is small and well controlled. As a result, the bit line or word line switching current is reduced and tightly distributed for better device performance. A key feature in the method of forming the MRAM cell structure is a two step planarization of an insulation layer deposited on the MTJ array. A CMP step flattens the insulation layer at a distance about 60 to 200 Angstroms above the cap layer in the MTJ. Then an etch back step thins the insulation layer to a level about 50 to 190 Angstroms below the top of the cap layer. Less than 5 Angstroms of the cap layer is removed. The distance variation from the free layer to an overlying bit line or word line is within +/−5 Angstroms.

Claims

1. A magnetic random access memory (MRAM) cell structure formed on a substrate, comprising:

(a) a first conductive layer formed within a first insulation layer on said substrate, said first conductive layer is comprised of an array of parallel first lines having a first width that are coplanar with said first insulation layer;

(b) an array of magnetic tunnel junctions (MTJs) formed on said parallel first lines, said MTJs have a length and width and are comprised of a bottom layer, a free layer on the bottom layer, and a cap layer on the free layer wherein the cap layer has a top surface and a bottom surface and the thickness “

y”

between the top surface and bottom surface is controlled within a range of about “

y”

+/−

5 Angstroms for all of said MTJs in said MRAM structure;

(c) a second insulation layer formed on said first insulation layer and on said first conductive layer, said second insulation layer contacts said cap layer and has an entire planar top surface which is below the top surface of said cap layer; and

(d) a second conductive layer comprised of an array of parallel second lines having a second width and aligned in a direction perpendicular to said first lines and wherein the array of second lines is formed over the MTJs so that an MTJ is located at each location where a second line crosses over a first line.

2. The MRAM cell structure of claim 1 wherein the first lines and second lines are comprised of copper, the first lines are bit lines, and the second lines are word lines.

3. The MRAM cell structure of claim 1 wherein the first lines and second lines are comprised of copper, the first lines are word lines, and the second lines are bit lines.

4. The MRAM cell structure of claim 1 wherein said cap layer is comprised of Cu, Ru, or is a composite layer with an upper Ru layer.

5. The MRAM cell structure of claim 1 wherein said cap layer has a thickness of about 50 to 400 Angstroms.

6. The MRAM cell structure of claim 1 wherein said second insulation layer is comprised of silicon oxide or a low k dielectric material and said certain distance below the top surface of said cap layer is about 50 to 190 Angstroms.

7. The MRAM cell structure of claim 1 wherein the bottom layer is comprised of a seed layer formed on a first line, an anti-ferromagnetic (AFM) layer on said seed layer, a pinned layer on said AFM layer, and a tunnel barrier layer on said pinned layer.

8. The MRAM cell structure of claim 1 wherein the width of said MTJ is less than or equal to said first width and the length of said MTJ is less than or equal to said second width.

9. The MRAM cell structure of claim 1 wherein the width of said MTJ is from about 0.2 to 0.9 microns.

10. An MRAM structure, comprising:

a) a first conductive layer;

b) a second conductive layer; and

c) an array of MTJs each having a length and width and comprised of a bottom layer, a free layer on the bottom layer, and a cap layer formed on the free layer wherein the cap layer has a top surface and a bottom surface and a thickness “

y”

between the top surface and bottom surface that is controlled to within a range of about “

v”

+/−

5 Angstroms for all of said MTJs in said MRAM structure, and each of said MTJs is formed between said first conductive layer and said second conductive layer.

11. The MRAM structure of claim 10 wherein said cap layer is comprised of Cu, Ru, or is a composite layer with an upper Ru layer.

12. The MRAM structure of claim 10 wherein said cap layer has a thickness of about 50 to 400 Angstroms.