Synchronous undersampling for high-frequency voltage and current measurements

• US 7,477,711 B2
• Filed: 05/19/2005
• Issued: 01/13/2009
• Est. Priority Date: 05/19/2005
• Status: Active Grant

• Current Assignee: MKS Instruments Incorporated
• Original Assignee: MKS Instruments Incorporated
• Inventors: Kalvaitis, Tim, Nagarkatti, Siddharth P.
• Primary Examiner(s): Liu; Shuwang
• Assistant Examiner(s): LAM, KENNETH T
• Application Number:
  US11/132,551
• Publication Number:
  US 20060262889A1
• Time in Patent Office: 1,335 Days
• Field of Search: 375/146, 375/147, 375/150, 375/355
• US Class Current: 375/355
• CPC Class Codes: H01J 37/32082 Radio frequency generated discharge H01J37/32357, H01J37/32366, H01J37/32394 and H01J37/32403 take precedence
• CPC Class Codes: H05H 1/0081 by electric means

Abstract

A power source may generate signals (RF or microwave), when driven by a drive signal from a controller. A sensor may measure the voltage and current of the signals generated by the power source, and may generate sensor signals representative of the measured voltage and current. A sampler may be configured to undersample the sensor signals, synchronously with the drive signal that drives the power source. The sampling frequency may be a scalar multiple of the fundamental frequency of the sensor signals. At RF frequencies, either synchronous undersampling or synchronous oversampling may be performed. At microwave frequencies, synchronous undersampling may be performed.

Claims

1. An apparatus comprising:

a power source configured to generate signals in response to a drive signal;

a sensor configured to measure a voltage and a current of the signals generated by the power source, and to generate sensor signals representative of the measured voltage and current;

a sampler configured to undersample the sensor signals synchronously with the drive signal that drives the power source, wherein the sampler comprises an A/D (analog-to-digital) converter and a sample clock, wherein the A/D converter is configured to control timing of samples in response to a timing reference provided by the sample clock,

wherein the frequency of the sample clock is a scalar multiple of the frequency of the drive signal generated by a DDS (direct digital synthesizer);

a controller configured to receive the undersampled sensor signals, and to generate a frequency command signal that sets a frequency, wherein the controller comprises a DSP (digital signal processor);

a drive signal generator configured to generate the drive signal at the frequency set by the frequency command signal, wherein the drive signal generator comprises the DDS;

one or more digital mixers configured to convolve the undersampled signals from the sampler with a sine wave signal and a cosine wave signal; and

one or more CIC (cascade integrator comb) filters configured to decimate the convolved undersampled signals, thereby extracting from the undersampled signals information relating to magnitude and phase,

wherein each one of the CIC filters are configured to generate one of an in-phase voltage signal, an out-of-phase voltage signal, an in-phase current signal, and an out-of-phase current signal.

2. The apparatus of claim 1,

wherein the digital mixers are further configured to control timing of the convolving in response to the timing reference provided by the sample clock;

and

wherein the CIC filters are further configured to control timing of the decimation in response to the timing reference provided by the sample clock.

3. The apparatus of claim 1,

wherein the sampler is configured to undersample the sensor signals at a sampling frequency f_s,

wherein each one of the sensor signals comprises a component having a fundamental frequency f, and

wherein the sampling frequency f_s is a scalar multiple of the fundamental frequency f;

wherein the sampling frequency f_s is related to the fundamental frequency f by an equation given by;

f_s=(N_samp/N_cycles)*f,

where N_cycles is an integer denoting the number of cycles over which sampling is performed by the sampler,

where N_samp is an integer denoting the number of samples obtained over a number N_cycles of cycles, and

wherein N_samp is different from N_cycles; and

wherein N_samp is related to an integer p in accordance with a formula given by;

N_samp=2^p;

and

wherein N_cycles is related to the integer p and to another integer q in accordance with a formula given by;

N_cycles=(2^p)^q+1.

4. The apparatus of claim 3,

wherein the signals generated by the power source comprise RF signals,

wherein p=6, and

wherein q=1.

5. The apparatus of claim 3,

wherein the signals generated by the power source comprise microwave frequency signals,

wherein p=6, and

wherein q=6.