Monolithic transmitter photonic integrated circuit (TxPIC) semiconductor chip

• US 7,477,807 B2
• Filed: 06/21/2007
• Issued: 01/13/2009
• Est. Priority Date: 10/09/2001
• Status: Expired due to Fees

• Current Assignee: Infinera Corp.
• Original Assignee: Infinera Corp.
• Inventors: Nilsson, Alan C., Mitchell, Matthew L., Taylor, Robert B., Nagarajan, Radhakrishnan L., Grubb, Stephen G., Perkins, Drew D., Mathur, Atul, Peters, Frank H., Welch, David F., Kish, Fred A. Jr., Missey, Mark J., Joyner, Charles H., Schneider, Richard P., Dominic, Vincent G., Webjorn, Jonas
• Primary Examiner(s): Hughes; James P
• Application Number:
  US11/766,693
• Publication Number:
  US 20070248299A1
• Time in Patent Office: 572 Days
• Field of Search: 385/14, 398/91, 372/26, 372/32, 372/14
• US Class Current: 385/14
• CPC Class Codes: B82Y 20/00 Nanooptics, e.g. quantum optics or photonic crystals
• CPC Class Codes: G01R 31/31728 Optical aspects, e.g. opto-electronics used for testing, optical signal transmission for testing electronic circuits, electro-optic components to be tested in combination with electronic circuits, measuring light emission of digital circuits probes having electro-optic elements G01R1/071; electro-optic sampling for oscilloscopes G01R13/347; contactless testing of individual semiconductor devices by optical means G01R31/2656
• CPC Class Codes: G01R 31/318511 Wafer Test
• CPC Class Codes: G02B 6/12004 Combinations of two or more optical elements
• CPC Class Codes: G02B 6/12007 forming wavelength selective elements, e.g. multiplexer, demultiplexer
• CPC Class Codes: G02B 6/12011 characterised by the arrayed waveguides, e.g. comprising a filled groove in the array section
• CPC Class Codes: G02B 6/12019 characterised by the optical interconnection to or from the AWG devices, e.g. integration or coupling with lasers or photodiodes coupling integrated waveguide to fibre G02B6/30, to optoelectronic element G02B6/42; monolithic integration of integrated waveguides with other optical elements G02B6/12004
• CPC Class Codes: G02B 6/12021 Comprising cascaded AWG devices; AWG multipass configuration; Plural AWG devices integrated on a single chip
• CPC Class Codes: G02B 6/12023 characterised by means for reducing the polarisation dependence, e.g. reduced birefringence
• CPC Class Codes: G02B 6/12026 characterised by means for reducing the temperature dependence
• CPC Class Codes: G02B 6/12028 based on a combination of materials having a different refractive index temperature dependence, i.e. the materials are used for transmitting light
• CPC Class Codes: G02B 6/12033 characterised by means for configuring the device, e.g. moveable element for wavelength tuning switching G02B6/35; thermo-optic devices G02F1/0147
• CPC Class Codes: G02B 6/131 by using epitaxial growth epitaxial growth for semiconductors H01L21/02365
• CPC Class Codes: G02B 6/136 by etching
• CPC Class Codes: G02B 6/4204 the coupling comprising intermediate optical elements, e.g. lenses, holograms encapsulated active devices H01S5/02208, H01L33/52
• CPC Class Codes: G02F 1/01725 Non-rectangular quantum well structures, e.g. graded or stepped quantum wells
• CPC Class Codes: G02F 1/0175 with a spatially varied well profile, e.g. graded or stepped quantum wells
• CPC Class Codes: G02F 1/01758 with an asymmetric well profile, e.g. asymmetrically stepped quantum wells
• CPC Class Codes: G02F 2203/69 Arrangements or methods for testing or calibrating a device
• CPC Class Codes: H01L 31/125 Composite devices with photosensitive elements and electroluminescent elements within one single body
• CPC Class Codes: H01S 5/0014 : Measuring characteristics or properties thereof measuring techniques per se G01J, G01K, G01N, G01R
• CPC Class Codes: H01S 5/0085 : for modulating the output, i.e. the laser beam is modulated outside the laser cavity
• CPC Class Codes: H01S 5/02325 : Mechanically integrated components on mount members or optical micro-benches
• CPC Class Codes: H01S 5/026 : Monolithically integrated components, e.g. waveguides, monitoring photo-detectors, drivers stabilisation of output H01S5/06
• CPC Class Codes: H01S 5/0262 : Photo-diodes, e.g. transceiver devices, bidirectional devices H01S5/0265 takes precedence
• CPC Class Codes: H01S 5/0264 : for monitoring the laser-output
• CPC Class Codes: H01S 5/0265 : Intensity modulators intra-cavity modulators H01S5/0625
• CPC Class Codes: H01S 5/0268 : Integrated waveguide grating router, e.g. emission of a multi-wavelength laser array is combined by a "dragon router"
• CPC Class Codes: H01S 5/06256 : with DBR-structure
• CPC Class Codes: H01S 5/06258 : with DFB-structure
• CPC Class Codes: H01S 5/0683 : by monitoring the optical output parameters
• CPC Class Codes: H01S 5/06832 : Stabilising during amplitude modulation
• CPC Class Codes: H01S 5/12 : the resonator having a periodic structure, e.g. in distributed feedback [DFB] lasers comprising a photonic bandgap structure H01S5/11; surface-emitting lasers H01S5/18
• CPC Class Codes: H01S 5/1228 : DFB lasers with a complex coupled grating, e.g. gain or loss coupling
• CPC Class Codes: H01S 5/2077 : using lateral bandgap control during growth, e.g. selective growth, mask induced
• CPC Class Codes: H01S 5/22 : having a ridge or stripe structure
• CPC Class Codes: H01S 5/3408 : characterised by specially shaped wells, e.g. triangular
• CPC Class Codes: H01S 5/4031 : Edge-emitting structures
• CPC Class Codes: H01S 5/4087 : emitting more than one wavelength
• CPC Class Codes: H01S 5/50 : Amplifier structures not provided for in groups H01S5/02 - H01S5/30
• CPC Class Codes: H04B 10/2914 : using lumped semiconductor optical amplifiers [SOA]
• CPC Class Codes: H04B 10/50 : Transmitters
• CPC Class Codes: H04J 14/02 : Wavelength-division multiplex systems
• CPC Class Codes: H04J 14/0246 : using one wavelength per ONU
• CPC Class Codes: H04J 14/025 : using one wavelength per ONU, e.g. for transmissions from-ONU-to-OLT or from-ONU-to-ONU
• CPC Class Codes: H04J 14/0258 : Wavelength identification or labelling
• CPC Class Codes: H04J 14/0265 : Multiplex arrangements in bidirectional systems, e.g. interleaved allocation of wavelengths or allocation of wavelength groups
• CPC Class Codes: H04J 14/0276 : using pilot tones
• CPC Class Codes: H04J 14/0282 : WDM tree architectures

Abstract

A photonic integrated circuit (PIC) chip comprising an array of modulated sources, each providing a modulated signal output at a channel wavelength different from the channel wavelength of other modulated sources and a wavelength selective combiner having an input optically coupled to received all the signal outputs from the modulated sources and provide a combined output signal on an output waveguide from the chip. The modulated sources, combiner and output waveguide are all integrated on the same chip.

Claims

1. A semiconductor chip comprising:

a substrate;

a plurality of DFB lasers provided on the substrate, each of the plurality of DFB lasers providing a corresponding one of a plurality of optical outputs at a respective one of a plurality of wavelengths;

an arrayed waveguide grating (AWG) provided on the substrate, the AWG having a plurality of inputs and an output, the output of the AWG supplying a WDM signal;

a plurality of electro-absorption (EA) modulators provided on the substrate;

a plurality of semiconductor optical amplifiers (SOAs) provided on the substrate; and

a plurality of optical paths, each of which being coupled between a corresponding one of the plurality of DFB lasers and a corresponding one of the plurality of inputs of the AWG, each of the plurality of optical paths receiving a respective one of the plurality of optical outputs, each of the plurality of optical paths including a corresponding one of the plurality of EA modulators and a corresponding of the plurality of SOAs.

2. The semiconductor chip of claim 1 wherein each of the plurality of DER lasers, each of the plurality of EA modulators and the AWG include an active region and a waveguide layer including InGaAsP or InAlGaAs.

3. The semiconductor chip of claim 1 wherein each of the plurality of SOAs is coupled to a corresponding one of the plurality of inputs of the AWG, each of the plurality of SOAs also being coupled to receive a corresponding one of the plurality of modulated signals.

4. The semiconductor chip of claim 1 further comprising a plurality of saturable absorbers (SAs), each of the plurality SAs coupled to a corresponding one of the plurality of optical paths between a corresponding one of the plurality of SOAs and a corresponding one of the plurality of inputs of the AWG.

5. The semiconductor chip of claim 1, wherein each or the plurality of SOAs is coupled between a corresponding one of the plurality of EA modulators and a corresponding one of the plurality of DFB lasers.

6. The semiconductor chip of claim 5 wherein a gain applied by each of the plurality of SOAs to the corresponding one of the plurality of optical outputs is varied to provide each of the plurality of optical outputs with a corresponding one of plurality of desired output powers.

7. The semiconductor chip of claim 1 further comprising a plurality of photodiodes, each of the plurality of photodiodes coupled to a corresponding one of the plurality of inputs of the AWG.

8. The semiconductor chip of claim 7 wherein a bias voltage is applied to each of the plurality of photodiodes, the bias voltage being modulated with a corresponding one of a plurality of tone identifying tags, each of the plurality of tone identifying tags being associated with a respective one of the plurality of DFB lasers.

9. The semiconductor chip of claim 1 further comprising a plurality of photodiodes (PDs), each of which being coupled to a corresponding one of the optical paths, each of the plurality of SOAs being coupled between a corresponding one of the plurality of EA modulators and a corresponding one of the plurality of PDs, each one of the PDs also being coupled to a corresponding one of the plurality of inputs of the AWG.

10. The semiconductor chip of claim 1 further comprising a plurality of heaters, each of the plurality of heaters being configured to control a temperature associated with a corresponding one of the plurality of DFB lasers.

11. The semiconductor chip of claim 1 wherein each of the plurality of EA modulators is modulated with a dual tone frequency.

41. The semiconductor chip of claim 3 further comprising a plurality of saturable absorbers (SAs), each of the plurality of SAs being coupled between a corresponding one of the plurality of inputs of the AWG and a corresponding one of the plurality of EA modulators.

12. A photonic integrated circuit chip comprising:

a plurality of DFB laser sources provided on the photonic integrated circuit chip, each of the plurality of DFB laser sources having an end portion which supplies a corresponding one of a plurality of light outputs, each of the light outputs having a corresponding one of a plurality of wavelengths;

an arrayed waveguide grating (AWG) provided on the photonic integrated circuit chip, the AWG having a plurality of inputs and an output, the output of the AWG supplying a portion of a WDM signal;

a plurality of electro-absorption (EA) modulators provided on the photonic integrated circuit chip;

a plurality of semiconductor optical amplifiers (SOAs) provided on the photonic integrated circuit chip;

a plurality optical paths, each of which being coupled between a corresponding one of the plurality of DFB lasers and a corresponding one of the plurality of input of the AWG, each of the plurality of optical paths receiving a respective one of the plurality of optical outputs, each of the plurality of optical paths including a corresponding one of the plurality of EA modulators and a corresponding one of the plurality of SOAs.

13. The photonic integrated circuit chip of claim 12 further comprising a plurality of photodiodes provided on the chip, each of the plurality of photodiodes positioned between a respective one of the plurality of electro-absorption modulations and a respective one of the plurality of inputs of the AWG.

14. The photonic integrated circuit chip of claim 12, wherein the end portions of said each of the plurality of DFB laser sources is a first end portion and the plurality of light outputs is a first plurality of light outputs, each of the plurality of DFB laser sources further including a second end portion that supplies a corresponding one of a second plurality of light outputs, the photonic integrated circuit further including a plurality of photodiodes, each of which being configured to receive a corresponding one of the plurality of second light outputs.

15. The photonic integrated circuit chip of claim 12 further comprising a plurality of photodiodes provided on the chip, each of the plurality of photodiodes coupled to a corresponding one of the plurality of optical paths to sense a light intensity of a respective one of the plurality of DFB laser sources.

16. The photonic integrated circuit chip of claim 12 wherein each of the EA modulators outputs a respective one of a plurality of modulated optical signals, further comprising a first set of photodiodes provided on the chip, each of the first set of photodiodes positioned adjacent to the second end of a respective one of the plurality of DFB laser sources to sense a light intensity of the respective one of the plurality of DFB laser sources, and a second set of photodiodes integrated on the chip, each of the second set of photodiodes being coupled to a corresponding one of the plurality of optical paths and being positioned between a respective one of the plurality of EA modulators and a respective one of the plurality of inputs of the arrayed waveguide grating to sense a corresponding one of the plurality of modulated optical signals.

17. The photonic integrated circuit chip of claim 12 wherein, each of the plurality of semiconductor optical amplifiers are positioned between a respective one of the plurality of the electro-absorption modulators and a respective one of the plurality of inputs of the AWG.

18. The photonic integrated circuit chip of claim 17 further comprising a plurality of photodiodes provided on the chip, each of the plurality of photodiodes being coupled to a corresponding one of the plurality of optical paths and being positioned between a respective one of the plurality of semiconductor optical amplifiers and a respective one of the plurality of inputs of the AWG to sense a light intensity of the respective one of the plurality of semiconductor amplifiers.

19. The photonic integrated circuit chip of claim 17 further comprising a first and second set of photodiodes provided integrated on the chip, each of the first set of photodiodes positioned adjacent to the second end of a respective one of the plurality of DFB laser sources to sense a light intensity from the respective one of the plurality of DFB laser sources, each of the second set of photodiodes being coupled to a corresponding one of the plurality of optical paths and being positioned between a respective one of the plurality of electro-absorption modulators and a respective one of the plurality of the semiconductor optical amplifiers to sense the corresponding one of the plurality of modulated output signals of the respective one of the plurality of the EA modulators.

20. The photonic integrated circuit chip of claim 17 further comprising a plurality of photodiodes provided on the chip, each of the plurality of photodiodes positioned between the end portion of a respective one of the plurality of DFB laser sources and a respective one of the plurality of electro-absorption modulators to sense a light intensity of a respective one of the plurality of DFB laser sources.

21. The photonic integrated circuit chip of claim 17 further comprising a photodiode on the chip, the photodiode coupled to the output of the AWG to sense a portion of the portion of the multiplexed WDM signal.

22. The photonic integrated circuit of claim 17 wherein the output of the AWG is a first output, the AWG further including a second output, the integrated circuit further including a photodiode positioned at a higher order Brillonin zone of the AWG to sense a portion of the multiplexed WDM signal or the plurality of different wavelengths of the DFB laser sources or the wavelength grid.

23. The photonic integrated circuit chip of claim 12 wherein the output of the AWG is a first output, the AWG further including a second output, the integrated circuit further including a photodiode coupled to the second output of the AWG to sense a portion of the multiplexed WDM signal.

24. The photonic integrated circuit chip of claim 23 wherein the photodiode can be cleaved from the chip.

25. The photonic integrated circuit chip of claim 24 wherein the photodiode is a PIN photodiode or an avalanche photodiode.

26. The photonic integrated circuit chip of claim 12 wherein the portion of the multiplexed WDM signal is a first portion of the multiplexed WDM signal and the output of the AWG is a first output positioned at a first order Brillouin zone output of the AWG, the AWG further including second and third outputs, each of the second and third outputs positioned in a first and second higher order Brillouin zone outputs provided on respective sides of the first order Brillonin zone output and supplying second and third portions of the multiplexed WDM signal, respectively, the chip further comprising a first and second photodiode provided on the chip, the first photodiode coupled to the second output of the AWG and the second photodiode coupled to the third output of the AWG such that the first output supplies the first portion of the multiplexed WDM signal and the first and second photodiodes sense second and third portions, respectively, of the multiplexed WDM signal.

27. The photonic integrated circuit chip of claim 26 wherein each of the first and second photodiodes is a PIN photodiode or an avalanche photodiodes.

28. The photonic integrated circuit chip of claim 26 wherein the first and second photodiodes can be cleaved from the chip.

29. The photonic integrated circuit chip of claim 12 further comprising a plurality of photodiodes provided on the chip, a first set of the plurality of photodiodes formed between the plurality of DFB laser sources and the plurality of electro-absorption modulators, a second set of the plurality of photodiodes formed between one of the plurality of EA modulators and a corresponding one of the plurality of inputs of the AWG, and one of the plurality of photodiodes formed at the output of the AWG to sense a portion of the multiplexed WDM signal.

30. The photonic integrated circuit chip of claim 29, wherein the end portion of said each of the plurality of DFB laser sources is a first end portion and the plurality of light outputs is a first plurality of light outputs, each of the plurality of DFB laser sources further including a second end portion that supplies a corresponding one of a second plurality of light outputs, the photonic integrated circuit further including a third set of the plurality of photodiodes, each of the third set of the plurality of photodiodes provided adjacent to the second end portion of a respective one of the plurality of DFB laser sources to sense a corresponding one of the second plurality of light outputs of a corresponding one of the plurality of DFB laser sources.

31. The photonic integrated circuit chip of claim 12 further comprising a plurality of heaters, each of the plurality of heaters being configured to adjust a temperature of a corresponding one of the plurality of DFB laser sources, to thereby tune a corresponding one of the plurality of wavelengths.

32. A semiconductor chip comprising:

a substrate;

a plurality of DFB lasers provided on the substrate, each of the plurality of DFB lasers providing a corresponding one of a plurality of optical outputs at a respective one of a plurality of wavelengths;

an arrayed waveguide grating (AWG) provided on the substrate, the AWG having a plurality of inputs and an output, the output of the AWG supplying a portion of a WDM signal;

a plurality of Mach-Zehnder (MZ) modulators provided on the substrate;

a plurality of semiconductor optical amplifiers (SOAs) provided on the substrate;

a plurality of optical paths, each of which being coupled between corresponding one of the plurality of DFB lasers and a corresponding one of the plurality of inputs of the AWG, each of the plurality of optical paths receiving a respective one of the plurality of optical outputs, each of the plurality of optical paths including a corresponding one of the plurality of MZ modulators and a corresponding one of the plurality of SOAs.

33. The semiconductor chip of claim 32 wherein each of the plurality of DFB lasers, each of the plurality of MZ modulators and the AWG include an active region and a waveguide layer comprised of InGaAsP or InAlGaAs.

34. The semiconductor chip of claim 32, wherein each of the plurality of SOAs is coupled between a corresponding one of the plurality of inputs of the AWG and a corresponding one of the plurality of MZ modulators.

35. The semiconductor chip of claim 34 further comprising a plurality of saturable absorbers (SAs), each of the plurality of SAs being coupled between a corresponding one of the plurality of SOAs and a corresponding one of the plurality of inputs to the AWG.

36. The semiconductor chip of claim 32, wherein each of the plurality of SOAs is coupled between a corresponding one of the plurality of DFB lasers and a corresponding one of the plurality of MZ modulators.

37. The semiconductor chip of claim 36 wherein a gain applied by each of the plurality of SOAs to the corresponding one of the plurality of optical outputs is varied to provide each of the plurality of optical outputs with a corresponding one of a plurality of desired output powers.

38. The semiconductor chip of claim 32 further comprising a plurality of photodiodes, each of the plurality of photodiodes coupled to a corresponding one of the plurality of inputs of the AWG.

39. The semiconductor chip of claim 38 wherein a bias voltage is applied to each of the plurality of photodiodes, the bias voltage being modulated with a corresponding one of a plurality of tone identifying tags, each of the plurality of tone identifying tags being associated with a respective one of the plurality of DFB lasers.

40. The semiconductor chip of claim 32 further comprising a plurality of heaters, each of the plurality of heaters being configured to control a temperature associated with a corresponding one of the plurality of DFB lasers.

42. The semiconductor chip of claim 34 further comprising a plurality of saturable absorbers (SAs), each of the plurality of SAs being coupled between a corresponding one of the plurality of inputs of the AWG and a corresponding one of the plurality of MZ modulators.

43. The semiconductor chip of claim 32, wherein each of the plurality of SOAs is coupled between a corresponding one of the plurality of MZ modulators and a corresponding one of the plurality of inputs to the AWG.

44. The semiconductor chip of claim 43 wherein a gain applied by each of the plurality of SOAs to the corresponding one of the plurality of optical outputs is varied to provide each of the plurality of optical outputs with a corresponding one of a plurality of desired output powers.