Interfacing systems operating through a logical address space and on a direct data file basis
First Claim
Patent Images
1. A method of operating a memory system, comprising:
- receiving a plurality of separate files of data identified by addresses within a continuous logical address space that does not contain an identification of the logical addresses of data within the separate files,operating with the logical address space divided into a plurality of contiguous logical address groups, wherein individual ones of the plurality of logical address groups contain a predetermined amount of data,logically addressing the data within the individual logical address groups by a unique group identification and offsets of data within the group, andmapping in data of the plurality of logical address group into the memory system wherein the memory system includes re-programmable non-volatile semiconductor memory cells divided into non-overlapping units, and wherein the predetermined amount of data of the individual logical address groups equals a data storage capacity of the individual memory cell units.
3 Assignments
0 Petitions
Accused Products
Abstract
A re-programmable non-volatile semiconductor memory, such as flash memory, operates to store files with logical addresses including a unique file identifier and offsets of data within the file, termed direct data file storage. Data files generated by a host may be stored directly in such a memory through a file interface. But if a traditional host/memory interface using a continuous logical address space is being used to identify multiple files, the address space is divided into contiguous logical files, and then these files are treated in the same manner as files obtained directly from a host. Both types of interfaces may be included in the same memory system.
199 Citations
33 Claims
-
1. A method of operating a memory system, comprising:
-
receiving a plurality of separate files of data identified by addresses within a continuous logical address space that does not contain an identification of the logical addresses of data within the separate files, operating with the logical address space divided into a plurality of contiguous logical address groups, wherein individual ones of the plurality of logical address groups contain a predetermined amount of data, logically addressing the data within the individual logical address groups by a unique group identification and offsets of data within the group, and mapping in data of the plurality of logical address group into the memory system wherein the memory system includes re-programmable non-volatile semiconductor memory cells divided into non-overlapping units, and wherein the predetermined amount of data of the individual logical address groups equals a data storage capacity of the individual memory cell units. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11)
-
-
12. A method of operating a re-programmable non-volatile memory system of a type having semiconductor memory cells divided into units of cells and an interface including a logical address space over which a plurality of data files received from a host through the interface are identified, comprising:
-
operating with the logical address space divided into a plurality of contiguous logical address groups having sizes equal to the storage capacity of the individual units of memory cells, and maintaining a table for mapping the logical groups into specific ones of the units of memory cells as separate files that individually have a unique file identification and offsets of data within the file. - View Dependent Claims (13)
-
-
14. A method of operating a non-volatile memory system of a type having memory cells divided into units of cells, comprising:
-
storing data in the memory system as files addressed by a unique file identification and offsets of data within the file, in response to receiving host data files from outside of the memory that are addressed by a unique file identification and offsets of data within the file, directly storing the received data files in the memory system by such a file address, and in response to receiving host data from outside of the memory that are addressed within a logical address space of the memory rather than as a host data file, storing the received host data as memory files of data addressed within predetermined groups of local address ranges, the memory files being stored by a unique file identification and offsets of data within the memory file. - View Dependent Claims (15, 16, 17, 18, 19, 20, 21, 22, 23)
-
-
24. Electronic apparatus, comprising:
-
a first system having an interface that identifies a first set of data files by unique addresses within a continuous logical address space, a second system having an interface that identifies a second set of data files by unique identifications of the files and offsets of data within the individual files, and a file converter that divides the continuous logical address space into distinct groups of addresses and identifies data within these groups of addresses as the second set of data files. - View Dependent Claims (25)
-
-
26. A data storage system comprising:
-
an addressable memory, an operational controller that causes addressed portions of the memory to be accessed for programming and reading data, a first interface including a continuous logical address space into which a plurality of host files may be mapped but which does not contain an identification of the addresses within the logical address space occupied by individual host files, address translation between (a) unique groups of addresses within the logical address space identified as logical files with a unique file identifier and offsets of data within the file but without regard to logical addresses of host files that occupy the logical address space and (b) addresses of physical portions of the memory, and a second interface for communication with a host system of host data logical files addressed by a unique host file identifier and offsets of data within the identified host file.
-
-
27. A re-programmable non-volatile memory system comprising:
-
an array of memory cells that individually include at least one charge storage element and which is divided into units of memory cells, a first address translator between (a) addresses of logical files that individually. include a unique file identifier and offsets of data within the identified file and (b) physical addresses of at least some of the units of memory cells, an operational controller that causes said at least some of the units of memory cells to be accessed for programming and reading data of the logical files, a first interface including a continuous logical address space into which a plurality of host files may be mapped but which does not contain an identification of the addresses within the logical address space occupied by individual host files, a second address translator between (a) groups of addresses within the logical address space identified as logical files with a unique file identifier and offsets of data within the file and (b) addresses of logical files of the first address translator, and a second interface for communication with a host system of host data logical files addressed by a unique host file identifier and offsets of data within the identified host file. - View Dependent Claims (28, 29, 30, 31, 32, 33)
-
Specification