Semiconductor device and method of manufacturing same

• US 7,482,182 B2
• Filed: 08/02/2006
• Issued: 01/27/2009
• Est. Priority Date: 04/24/2002
• Status: Expired due to Fees

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Kuwabara, Hideaki, Seo, Satoshi, Yamazaki, Shunpei
• Primary Examiner(s): Monbleau; Davienne
• Assistant Examiner(s): Trinh; Hoa B
• Application Number:
  US11/497,618
• Publication Number:
  US 20060267030A1
• Time in Patent Office: 909 Days
• Field of Search: 438/22, 438/24, 438/48, 438/128, 438/149, 438/151, 438/157, 257/59, 257/72, 257/E51.018, 257/E29.325, 257/E29.346, 257/E29.049
• US Class Current: 438/22
• CPC Class Codes: G01J 1/4228 arrangements with two or more detectors, e.g. for sensitivity compensation
• CPC Class Codes: H01L 25/167 comprising optoelectronic devices, e.g. LED, photodiodes
• CPC Class Codes: H01L 33/0041 characterised by field-effect operation
• CPC Class Codes: H10K 2102/3026 Top emission
• CPC Class Codes: H10K 50/81 Anodes
• CPC Class Codes: H10K 50/813 characterised by their shape
• CPC Class Codes: H10K 50/818 Reflective anodes, e.g. ITO combined with thick metallic layers
• CPC Class Codes: H10K 50/82 Cathodes
• CPC Class Codes: H10K 50/824 combined with auxiliary electrodes
• CPC Class Codes: H10K 50/828 Transparent cathodes, e.g. comprising thin metal layers
• CPC Class Codes: H10K 50/841 Self-supporting sealing arrangements
• CPC Class Codes: H10K 50/856 comprising reflective means
• CPC Class Codes: H10K 50/87 Arrangements for heating or cooling
• CPC Class Codes: H10K 59/12 Active-matrix OLED [AMOLED] displays
• CPC Class Codes: H10K 59/1201 Manufacture or treatment
• CPC Class Codes: H10K 59/1213 the pixel elements being TFTs
• CPC Class Codes: H10K 59/122 Pixel-defining structures or layers, e.g. banks
• CPC Class Codes: H10K 59/124 Insulating layers formed between TFT elements and OLED elements
• CPC Class Codes: H10K 59/131 Interconnections, e.g. wiring lines or terminals
• CPC Class Codes: H10K 59/30 Devices specially adapted for multicolour light emission
• CPC Class Codes: H10K 59/35 : comprising red-green-blue [RGB] subpixels
• CPC Class Codes: H10K 59/38 : comprising colour filters or colour changing media [CCM]
• CPC Class Codes: H10K 71/00 : Manufacture or treatment specially adapted for the organic devices covered by this subclass
• CPC Class Codes: H10K 77/10 : Substrates, e.g. flexible substrates
• CPC Class Codes: Y02E 10/549 : Organic PV cells
• CPC Class Codes: Y02P 70/50 : Manufacturing or production processes characterised by the final manufactured product

Abstract

A FET is formed on a semiconductor substrate, a curved surface having a radius of curvature is formed on an upper end of an insulation, a portion of a first electrode is exposed corresponding to the curved surface to form an inclined surface, and a region defining a luminescent region is subjected to etching to expose the first electrode. Luminescence emitted from an organic chemical compound layer is reflected by the inclined surface of the first electrode to increase a total quantity of luminescence taken out in a certain direction.

Claims

1. A method of manufacturing a semiconductor device comprising:

forming a field effect transistor using a semiconductor substrate;

forming an insulating film covering an end portion of a first electrode comprising a laminated metallic layers, wherein the first electrode is a part of a drain electrode or a source electrode of the field effect transistor;

performing etching with the insulating film as a mask to thin a center of the first electrode so that an inclined surface of the first electrode is exposed along an edge portion of the first electrode;

forming a layer containing an organic compound on the center and the inclined surface of the first electrode; and

forming a second electrode comprising a metallic thin film permitting permeation of light, on the layer containing an organic compound.

2. The method according to claim 1, wherein the first electrode comprises a laminated light-reflective metallic layers and a metallic layer serving as a stopper for etching, the light-reflective metallic layer is subjected to etching, and a light-reflective metallic material is exposed on the inclined surface.

3. The method according to claim 1, wherein the first electrode is an anode comprising a metallic layer having a greater work function than that of the second electrode.

4. The method according to claim 1, wherein the first electrode comprises a lamination of a first metallic layer containing titanium, second metallic layer containing titanium nitride or tungsten nitride, third metallic layer containing aluminum, and a fourth metallic layer containing titanium nitride.

5. The method according to claim 1, wherein the insulating film covering the end of the first electrode has a curved surface having a radius of curvature at an upper end thereof and the radius of curvature is 0.2 μ

m to 3 μ

m.

6. The method according to claim 1, wherein the field effect transistor is a MISFET or a MOSFET.

7. A method of manufacturing a semiconductor device comprising:

forming a field effect transistor using a semiconductor substrate;

forming an insulating film covering an end portion of a first electrode comprising a metallic layer, wherein the first electrode is a part of a drain electrode or a source electrode of the field effect transistor;

performing etching with the insulating film as a mask to thin a center of the first electrode so that the first electrode has an inclined surface directed toward a center of the first electrode, and the inclined surface reflects light emitted from the layer containing an organic compound;

forming a layer containing an organic compound on the first electrode; and

forming a second electrode comprising a metallic thin film permitting permeation of light on the layer containing an organic compound.

8. The method according to claim 7, wherein the first electrode comprises a laminated light-reflective metallic layers and a metallic layer serving as a stopper for etching, the light-reflective metallic layer is subjected to etching, and a light-reflective metallic material is exposed on the inclined surface.

9. The method according to claim 7, wherein the first electrode is an anode comprising a metallic layer having a greater work function than that of the second electrode.

10. The method according to claim 7, wherein the first electrode comprises a lamination of a first metallic layer containing titanium, second metallic layer containing titanium nitride or tungsten nitride, third metallic layer containing aluminum, and a fourth metallic layer containing titanium nitride.

11. The method according to claim 7, wherein the insulating film covering the end of the first electrode has a curved surface having a radius of curvature at an upper end thereof and the radius of curvature is 0.2 μ

m to 3 μ

m.

12. The method according to claim 7, wherein the field effect transistor is a MJSFJBT or a MOSFET.

13. A method of manufacturing a semiconductor device comprising:

forming a field effect transistor using a semiconductor substrate;

forming an insulating film covering an end portion of a first electrode comprising a metallic layer, wherein the first electrode is a part of a drain electrode or a source electrode of the field effect transistor;

performing etching with the insulating film as a mask to thin a center of the first electrode so that a center of the first electrode is concave-shaped to have a smaller film thickness than that of the end thereof;

forming a, layer containing an organic compound on the first electrode; and

forming a second electrode comprising a metallic thin film permitting permeation of light, on the layer containing an organic compound.

14. The method according to claim 13, wherein the first electrode comprises a laminated light-reflective metallic layers and a metallic layer serving as a stopper for etching, the light-reflective metallic layer is subjected to etching, and a light-reflective metallic material is exposed on an inclined surface.

15. The method according to claim 13, wherein the first electrode is an anode comprising a metallic layer having a greater work function than that of the second electrode.

16. The method according to claim 13, wherein the first electrode comprises a lamination of a first metallic layer containing titanium, second metallic layer containing titanium nitride or tungsten nitride, third metallic layer containing aluminum, and a fourth metallic layer containing titanium nitride.

17. The method according to claim 13, wherein the insulating film covering the end of the first electrode has a curved surface having a radius of curvature at an upper end thereof and the radius of curvature is 0.2 μ

m to 3 μ

m.

18. The method according to claim 13, wherein the field effect transistor is a MISFET or a MOSFET.

19. A method of manufacturing a semiconductor device comprising:

forming a field effect transistor using a semiconductor substrate;

forming an insulating film covering an end portion of a first electrode comprising multi-metallic layers, wherein the first electrode is a part of a drain electrode or a source electrode of the field effect transistor;

performing etching with the insulating film as a mask to thin a center of the first electrode so that the number of multi-metallic layers at a center of the first electrode is less than that at the end portion;

forming a layer containing an organic compound on the first electrode; and

forming a second electrode comprising a metallic thin film permitting permeation of light, on the layer containing an organic compound.

20. The method according to claim 19, wherein the first electrode comprises a laminated light-reflective metallic layers and a metallic layer serving as a stopper for etching, the light-reflective metallic layer is subjected to etching, and a light-reflective metallic material is exposed on an inclined surface.

21. The method according to claim 19, wherein the first electrode is an anode comprising a metallic layer having a greater work function than that of the second electrode.

22. The method according to claim 19, wherein the first electrode comprises a lamination of a first metallic layer containing titanium, second metallic layer containing titanium nitride or tungsten nitride, third metallic layer containing aluminum, and a fourth metallic layer containing titanium nitride.

23. The method according to claim 19, wherein the insulating film covering the end of the first electrode has a curved surface having a radius of curvature at an upper end thereof and the radius of curvature is 0.2 μ

m to 3 μ

m.

24. The method according to claim 19, wherein the field effect transistor is a MISFET or a MOSFET.

25. A method of manufacturing a semiconductor device comprising:

forming a field effect transistor using a semiconductor substrate;

forming an insulating film covering an end portion of a first electrode comprising a metallic layer, wherein the first electrode is a part of a drain electrode or a source electrode of the field effect transistor;

performing etching with the insulating film as a mask to thin a center of the first electrode so that the first electrode has a depression, and a bottom width of the depression is smaller than a top width of the depression;

forming a layer containing an organic compound on the first electrode; and

forming a second electrode comprising a metallic thin film permitting permeation of light, on the layer containing an organic compound.

26. The method according to claim 25, wherein the first electrode comprises a laminated light-reflective metallic layers and a metallic layer serving as a stopper for etching, the light-reflective metallic layer is subjected to etching, and a light-reflective metallic material is exposed on an inclined surface.

27. The method according to claim 25, wherein the first electrode is an anode comprising a metallic layer having a greater work function than that of the second electrode.

28. The method according to claim 25, wherein the first electrode comprises a lamination of a first metallic layer containing titanium, second metallic layer containing titanium nitride or tungsten nitride, third metallic layer containing aluminum, and a fourth metallic layer containing titanium nitride.

29. The method according to claim 25, wherein the insulating film covering the end of the first electrode has a curved surface having a radius of curvature at an upper end thereof and the radius of curvature is 0.2 μ

m to 3 μ

m.

30. The method according to claim 25, wherein the field effect transistor is a MISFET or a MOSFET.