Method of manufacturing a semiconductor device having MEMS

• US 7,482,196 B2
• Filed: 01/11/2006
• Issued: 01/27/2009
• Est. Priority Date: 09/19/2002
• Status: Expired due to Fees

• Current Assignee: Nippon Telegraph and Telephone Corporation
• Original Assignee: Nippon Telegraph and Telephone Corporation
• Inventors: Sakata, Tomomi, Tanabe, Yasuyuki, Urano, Masami, Ishii, Hiromu, Machida, Katsuyuki, Shimamura, Toshishige
• Primary Examiner(s): Pizarro; Marcos D.
• Assistant Examiner(s): MONTALVO, EVA Y
• Application Number:
  US11/330,951
• Publication Number:
  US 20060115920A1
• Time in Patent Office: 1,112 Days
• Field of Search: 438/50, 438/52, 438/53, 438/48, 438/60, 438/294, 438/65, 438/66, 438/67, 438/69, 438/74, 438/72, 385/18, 385/16, 385/17, 359/872, 359/877
• US Class Current: 438/69
• CPC Class Codes: B81C 1/00246 Monolithic integration, i.e. micromechanical structure and electronic processing unit are integrated on the same substrate
• CPC Class Codes: B81C 2203/0735 Post-CMOS, i.e. forming the micromechanical structure after the CMOS circuit

Abstract

In a semiconductor device having a MEMS according to this invention, a plurality of units having movable portions for constituting a MEMS are monolithically mounted on a semiconductor substrate on which an integrated circuit including a driving circuit, sensor circuit, memory, and processor is formed. Each unit has a processor, memory, driving circuit, and sensor circuit.

Claims

1. A method of manufacturing a semiconductor device having a MEMS, comprising the steps of:

forming an integrated circuit including a processor, a memory, a driving circuit, and a sensor circuit on a semiconductor substrate;

forming on the semiconductor substrate an interlayer dielectric layer which covers the integrated circuit;

forming a seed layer on the interlayer dielectric layer;

forming on the seed layer a first sacrificial pattern having openings in a first region, a plurality of second regions, and a plurality of third regions;

forming on the seed layer exposed in the

first, second, and third regions a first metal pattern substantially equal in film thickness to the first sacrificial pattern by plating, and a second metal pattern and a third metal pattern not larger in film thickness than the first metal pattern;

after forming the first, second, and third metal patterns into predetermined film thicknesses, forming on the first sacrificial pattern and the second and third metal patterns a second sacrificial pattern having an opening in a fourth region on the first metal pattern;

forming a fourth metal pattern substantially equal in film thickness to the second sacrificial pattern by plating on a surface of the first metal pattern that is exposed in the fourth region;

after forming the fourth metal pattern into a predetermined film thickness, removing the first and second sacrificial patterns;

after removing the sacrificial patterns, selectively removing the seed layer by using the first, second, and third metal patterns as a mask, thereby forming a support member from a layered structure of the first and fourth metal patterns, a plurality of control electrodes which are formed from the plurality of second metal patterns and separated from each other on the interlayer dielectric layer, and a plurality of sensor electrodes which are formed from the plurality of third

metal patterns and separated from each other on the interlayer dielectric layer;

preparing a mirror substrate which comprises mirrors in a plurality of opening regions and is formed from a conductive material, the mirrors being pivotally coupled to the mirror substrate via coupling portions; and

connecting and fixing the mirror substrate onto the support member to arrange the mirrors of the mirror substrate at an interval above the control electrodes and the sensor electrodes,

wherein the control electrodes are electrically connected to the driving circuit so as to receive a signal from the driving circuit, and

the sensor electrodes are electrically connected to the sensor circuit so as to output a signal to the sensor circuit.

2. A method according to claim 1, wherein before the mirror substrate is connected and fixed onto the support member, a predetermined resin pattern is formed by stencil printing to form a protective film which covers at least top of the control electrode.

3. A method according to claim 1, wherein before the mirror substrate is connected and fixed onto the support member,

a photosensitive resin pattern which covers the control electrode is formed by stencil printing, and

the resin pattern is patterned by photolithography to form a protective film which covers at least top of the control electrode.

4. A method of manufacturing a semiconductor device having a MEMS, comprising the steps of:

forming an integrated circuit including a processor, a memory, a driving circuit, and a sensor circuit on a semiconductor substrate;

forming on the semiconductor substrate an interlayer dielectric layer which covers the integrated circuit;

forming a seed layer on the interlayer dielectric layer;

forming on the seed layer a first sacrificial pattern having openings in a first region, a plurality of second regions, and a plurality of third regions;

forming on the seed layer exposed in the first, second, and third regions a first metal pattern substantially equal in film thickness to the first sacrificial pattern by plating, and a second

metal pattern and a third metal pattern not larger in film thickness than the first metal pattern;

after forming the first, second, and third metal patterns into predetermined film thicknesses,

forming on the first sacrificial pattern and the second and third metal patterns a second sacrificial pattern having an opening in a fourth region on the first metal pattern;

forming a fourth metal pattern substantially equal in film thickness to the second sacrificial pattern by plating on a surface of the first metal pattern that is exposed in the fourth region;

after forming the fourth metal pattern into a predetermined film thickness, forming on the second sacrificial pattern a mirror substrate which is electrically connected to the fourth metal pattern and formed from a conductive material;

forming a through hole in the mirror substrate, and forming in a plurality of predetermined regions of the mirror substrate a plurality of mirrors which are pivotally coupled to the mirror substrate via coupling portions;

removing the first and second sacrificial patterns via the through hole formed in the mirror substrate; and

after removing the sacrificial patterns, selectively removing the seed layer via the through hole by using the first, second, and third metal patterns as a mask, thereby forming a support member from a layered structure of the first and fourth metal patterns, a plurality of control electrodes which are formed from

the plurality of second metal patterns and separated from each other on the interlayer dielectric layer, and a plurality of sensor electrodes which are formed from the plurality of third metal patterns and separated from each other on the interlayer dielectric layer,

wherein the mirrors formed on the mirror substrate are arranged at an interval above the control electrodes and the sensor electrodes,

the control electrodes are electrically connected to the driving circuit so as to receive a signal from the driving circuit, and

the sensor electrodes are electrically connected to the sensor circuit so as to output a signal to the sensor circuit.