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Multi-bit nonvolatile memory devices

  • US 7,482,649 B2
  • Filed: 01/19/2006
  • Issued: 01/27/2009
  • Est. Priority Date: 01/20/2005
  • Status: Active Grant
First Claim
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1. A multi-bit nonvolatile memory device comprising:

  • a semiconductor substrate in which a recessed region is defined;

    an insulating layer configured to store data within programming regions therein, the insulating layer covering a sidewall and a lower surface of the recess region;

    a gate electrode on the insulating layer in the recessed region; and

    at least one pair of impurity regions in the semiconductor substrate, the impurity regions adjoining a side surface of the insulating layer in the recess region and forming a relative angle that is less than 120°

    therebetween with respect to a center of the gate electrode, wherein multiple different bit values are selectively stored in different programming regions of the insulating layer around the gate electrode by selective application of voltage to different ones of the impurity regions adjoining the programming regions of the insulating layer to be programmed.

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