Method and system for reducing volatile memory DRAM power budget
First Claim
1. An apparatus, comprising:
- a dynamic memory comprising a plurality of data storage blocks configured to store data, wherein the plurality of data storage blocks comprises a plurality of faultless data storage blocks and one or more faulty data storage blocks, each faulty data storage block having one or more faulty storage locations, and wherein the data to be stored in each faulty data storage block has an error correction code that is associated with an error correction method selected based at least in part on the amount of faulty storage locations in the faulty data storage block; and
a memory management module coupled to the dynamic memory and configured to;
read back data stored in an addressed one of the plurality of data storage blocks;
determine whether the addressed data storage block is a faulty data storage block, and if the addressed data storage block is determined to be a faulty data storage block, further;
determine the selected error correction method for the faulty data storage block, andcorrect the read back data using the associated error correction code and in accordance with the determined error correction method.
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Accused Products
Abstract
A portable device (114) includes a power source (120), a volatile memory (118) requiring refreshing to avoid data loss, and a memory management module (116). The volatile memory (118) is operably coupled to the power source (120) for power. The memory management module (116) is operably coupled to the volatile memory (118). The memory management module (116) is also adapted to refresh the volatile memory (118) at a refresh rate which causes refresh-based errors and to correct the refresh-based errors. Also disclosed is a method for reduced power consumption by a volatile memory requiring refreshing to avoid data loss in which such a volatile memory is refreshed (122) at a refresh rate. All defective bits are detected (124) at the refresh rate. An error correction code is selected (126) for correcting the defective bits.
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Citations
13 Claims
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1. An apparatus, comprising:
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a dynamic memory comprising a plurality of data storage blocks configured to store data, wherein the plurality of data storage blocks comprises a plurality of faultless data storage blocks and one or more faulty data storage blocks, each faulty data storage block having one or more faulty storage locations, and wherein the data to be stored in each faulty data storage block has an error correction code that is associated with an error correction method selected based at least in part on the amount of faulty storage locations in the faulty data storage block; and a memory management module coupled to the dynamic memory and configured to; read back data stored in an addressed one of the plurality of data storage blocks; determine whether the addressed data storage block is a faulty data storage block, and if the addressed data storage block is determined to be a faulty data storage block, further; determine the selected error correction method for the faulty data storage block, and correct the read back data using the associated error correction code and in accordance with the determined error correction method. - View Dependent Claims (2, 3, 4, 5)
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6. A method, comprising
reading stored data from an addressed one of a plurality of data storage blocks of a dynamic memory, wherein the plurality of data storage blocks comprises a plurality of faultless data storage blocks and one or more faulty data storage blocks, each faulty data storage block having one or more faulty storage locations, and wherein the data stored in each faulty data storage block has an error correction code that is associated with an error correction method selected based at least in part on the amount of faulty storage locations in the faulty data storage block; -
determining whether the addressed data storage block is a faulty data storage block; and if the addressed data storage block is a faulty data storage block, determining the selected error correction method associated with the error correction code employed to store data in the addressed data storage block, and correcting the data read using the error correction code and in accordance with the determined error correction method. - View Dependent Claims (7, 8)
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9. A method, comprising:
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receiving an instruction to write incoming data to a dynamic memory device having a plurality of data storage blocks, wherein the plurality of data storage blocks comprises a plurality of faultless data storage blocks and one or more faulty data storage blocks, each faulty data storage block having one or more faulty storage locations; selecting one of the plurality of data blocks to write the incoming data; determining whether the selected data storage block is a faulty data storage block, and if the selected data storage block is determined to be a faulty data storage block; determining an error correction method for correcting the incoming data when the incoming data is read back from the dynamic memory after the incoming data has been stored into the selected data storage block; calculating an error correction code for the incoming data in accordance with the error correction method; and writing the incoming data and the error correction code to the selected data storage block. - View Dependent Claims (10, 11, 12, 13)
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Specification