Power management in a display controller

• US 7,484,112 B2
• Filed: 02/18/2005
• Issued: 01/27/2009
• Est. Priority Date: 10/18/2004
• Status: Active Grant

• Current Assignee: Genesis Microchip Inc. (STMicroelectronics NV)
• Original Assignee: Genesis Microchip Inc. (STMicroelectronics NV)
• Inventors: Noorbakhsh, Ali, Lattanzi, John, Keene, David, Chilukuri, Ram
• Primary Examiner(s): Du; Thuan N
• Application Number:
  US11/060,917
• Publication Number:
  US 20060082569A1
• Time in Patent Office: 1,439 Days
• Field of Search: 713/340, 713/322, 345/52
• US Class Current: 713/340
• CPC Class Codes: G09G 2330/02 Details of power systems and of start or stop of display operation
• CPC Class Codes: G09G 2370/047 using display data channel standard [DDC] communication
• CPC Class Codes: G09G 5/006 Details of the interface to the display terminal specific for a display terminal using a CRT G09G1/167; using a flat panel G09G3/2096; circuits for interfacing with colour displays G09G5/04

Abstract

Managing power in a display controller having an on-board power supply coupled to a host device having an off-board power supply by way of a connector is described. If the on-board power supply is active, then power is supplied to the display controller by the off-board power supply by way of the connector and a low frequency clock arranged to provide a low frequency clock signal is turned on. Alternatively, when it is determined that the on-board power supply is active, then power is supplied to the display controller by the on-board power supply only, the low frequency clock is turned off and a high frequency clock arranged to provide a high frequency clock signal is turned on.

Claims

1. A method of managing power in a display controller having an on-board power supply coupled to a host device having an off-board power supply by way of a connector, comprising:

determining if the on-board power supply is active;

when it is determined that the on-board power supply is not active, then

providing power to the display controller by the off-board power supply by way of the connector;

turning on a low frequency clock arranged to provide a low frequency clock signal;

when it is determined that the on-board power supply is active, then

providing power to the display controller by the on-board power supply only once the display controller finishes partially completed display controller operations;

turning off the low frequency clock;

turning on a high frequency clock arranged to provide a high frequency clock signal;

wherein the display controller remains fully operational regardless of changes in the state of the on-board power supply.

2. The method as recited in claim 1, wherein when the on-board power supply is active and providing power to the display controller then a display controller power mode is a power-on mode.

3. The method as recited in claim 2, wherein when the on-board power supply is not active and power to the display controller is provided by the off-board power supply by way of the connector then the display controller mode is a power-off mode.

4. The method as recited in claim 3, further comprising:

determining the display controller mode.

5. The method as recited in claim 4, further comprising:

detecting a reference clock signal (T_LCK) that can be generated with internal oscillator, external oscillator or clock source wherein the presence of the reference clock signal(T_LCK) indicates that the controller mode is the power-on mode.

6. Computer program product executable by a processor for managing power in a display controller having an on-board power supply coupled to a host device having an off-board power supply by way of a connector, comprising:

computer code for determining if the on-board power supply is active;

computer code for providing power to the display controller by the off-board power supply by way of the connector when it is determined that the on-board power supply is not active;

computer code for turning on a low frequency clock arranged to provide a low frequency clock signal;

computer code for providing power to the display controller by the on-board power supply only once the display controller finishes partially completed operations when it is determined that the on-board power supply is active;

computer code for turning off the low frequency clock;

computer code for turning on a high frequency clock arranged to provide a high frequency clock signal, wherein the display controller remains fully operational regardless of changes in the state of the on-board power supply; and

computer readable medium for storing the computer code.

7. The computer program product as recited in claim 6, wherein when the power supply is active and providing power to the display controller then a display controller power mode is a power-on mode.

8. The computer program product as recited in claim 7, wherein when the on-board power supply is not active and power to the display controller is provided by the off-board power supply by way of the connector then the display controller mode is a power-off mode.

9. The computer program product as recited in claim 8, further comprising:

computer code for determining the display controller mode.

10. The computer program product as recited in claim 9, further comprising:

computer code for detecting a reference clock signal (T_LCK) that can be generated with internal oscillator, external oscillator or clock source wherein the presence of the reference clock signal (T_LCK) indicates that the controller mode is the power-on mode.

11. A power manager unit coupled to a display controller having an on-board power supply coupled to a host device having an off-board power supply by way of a connector that:

provides power to the display controller from the off-board power supply by way of the connector when the on-board power supply is not active and turns on a low frequency clock arranged to provide a low frequency clock signal, and

provides power to the display controller from the on-board power supply and turns off the low frequency clock and turns on the high frequency clock arranged to provide a high frequency clock signal when it is determined that the on-board power supply is active, capable of providing power to the display controller, and partially completed operations of the display controller operations are finished,

wherein the display controller remains fully operational regardless of changes in the state of the on-board power supply.

12. The power manager unit as recited in claim 11, wherein when the on-board power supply is capable of providing power to the display controller, then the power manager unit disconnects the off-board power supply and re-connects the on-board power supply.

13. The power manager unit as recited in claim 12, wherein when the on-board power supply is active and providing power to the display controller then a display controller power mode is a power-on mode.

14. The power manager unit as recited in claim 13, wherein when the on-board power supply is not active and power to the display controller is provided by the off-board power supply by way of the connector then the display controller mode is a power-off mode.

15. The power manager unit as recited in claim 14, further comprising:

a display controller mode detector unit arranged to detect the display controller mode.

16. The power manager unit as recited in claim 15, further comprising:

a reference clock detector unit for detecting a reference clock signal indicative that the display controller mode is the power-on mode.

17. The power manager unit as recited in claim 16, wherein the reference clock signal can be generated by an internal oscillator or an external oscillator or a clock source.