Digitally modified resistive output for a temperature sensor

• US 7,484,887 B2
• Filed: 02/20/2004
• Issued: 02/03/2009
• Est. Priority Date: 02/20/2003
• Status: Active Grant

• Current Assignee: Measurement Specialties Incorporated (TE Connectivity Limited)
• Original Assignee: YSIS, Inc.
• Inventors: Kill, Robert A., Shidemantle, Jack P.
• Primary Examiner(s): Verbitsky; Gail
• Assistant Examiner(s): Jagan; Mirellys
• Application Number:
  US10/783,491
• Publication Number:
  US 20040165646A1
• Time in Patent Office: 1,810 Days
• Field of Search: 374/183, 374/185, 374/172, 374/173, 374/168, 374/169, 374/163, 374/100, 374/170, 374/171, 374/1, 600/549, 702/99, 702/104, 702/131, 702/133
• US Class Current: 374/183
• CPC Class Codes: G01K 7/25 for modifying the output characteristic, e.g. linearising
• CPC Class Codes: G01K 7/42 Circuits effecting compensation of thermal inertia; Circuits for predicting the stationary value of a temperature

Abstract

A method for digitally controlling the resistive output of a temperature probe is disclosed. The system is comprised of a temperature sensor, a processor and a means under the control of the processor for modifying the resistive output such as a digital potentiometer. In one embodiment, the processor reads the temperature sensor and adjusts the potentiometer based on a correlative or predictive technique so as to provide a modified output that matches that of a standard resistive temperature probe and is compatible for display on a multiparameter monitor.

Claims

1. An interface for a monitor and a temperature probe including a temperature sensor comprising:

a logic circuit for determining a modified resistive output for the temperature sensor and

a means for providing the modified resistive output, wherein the means for providing the modified resistive output is compatible with the monitor such that the monitor can display a temperature that corresponds to the modified resistive output from the temperature probe, said means including a FET coupled to said logic circuit via a first terminal and via a feedback arrangement, said means providing a FET resistance corresponding to the modified resistive output.

2. The interface of claim 1 wherein the logic circuit is programmed to execute a predictive or a correlative algorithm.

3. The interface of claim 2 wherein the logic circuit is a microprocessor.

4. A temperature probe comprising:

a temperature sensor having a resistive output,

a processor for determining a modified resistive output for the temperature sensor, the processor being programmed to execute a predictive or a correlative algorithm, and

a FET for providing the modified resistive output in response to a signal from the processor,

wherein the algorithm is a predictive algorithm that converts the resistive output of the temperature sensor during a thermally unstable condition to a modified resistive output representative of a predicted temperature during a condition of thermal stability.

5. The temperature probe of claim 4 wherein the processor executes an algorithm to convert the resistive output of the temperature sensor to a modified resistive output that can be displayed by a monitor.

6. The temperature probe of claim 4 wherein the probe includes two FETs.

7. A method for digitally modifying the resistive output of a temperature sensor which comprises inputting the resistive output from the temperature sensor to a logic circuit, implementing a predictive or a correlative algorithm using the logic circuit to determine a modified resistive output, controlling a gate of a FET to adopt a setting corresponding to the modified resistive output, and outputting a resistance corresponding to the modified resistive output.

8. The method of claim 7 further including measuring a FET voltage with a first amplifier, measuring a resistor voltage of a first resistor having a first resistance, calculating a FET current using the first resistance and the resistor voltage, calculating a FET resistance using the FET voltage and the FET current, comparing the FET resistance to the modified resistive output and applying a difference between the FET resistance and the modified resistive output as a negative feedback to the gate.

9. A temperature probe comprising:

a temperature sensor that provides a resistive output,

a logic circuit for determining a modified resistive output for the temperature sensor, and

a means for providing the modified resistive output including a FET,

wherein the logic circuit is a microprocessor programmed to execute a predictive or a correlative algorithm, and

wherein the microprocessor includes an output and the FET includes a gate, where the output of the microprocessor controls the gate of the FET such that the FET provides a FET resistance corresponding to the modified resistive output.

10. The temperature probe of claim 9 wherein the microprocessor further includes:

a first input from a first amplifier, where the first amplifier measures a FET voltage of the FET, and

a second input from a second amplifier, where the second amplifier measures a resistor voltage of a resistor having a first resistance,

where the microprocessor calculates a FET current using the first resistance and the resistor voltage from the second input, calculates a FET resistance using the FET voltage from the first input and the FET current, compares the FET resistance to the modified resistive output and applies a difference between the FET resistance and the modified resistive output as a negative feedback to the gate.

11. An interface for a monitor and a temperature probe including a temperature sensor comprising:

a logic circuit for determining a modified resistive output for the temperature sensor and

a means for providing the modified resistive output, wherein the means for providing the modified resistive output includes a FET, and

wherein the logic circuit includes an output and the FET includes a gate, where the output of the logic circuit controls the gate of the FET such that the FET provides a FET resistance corresponding to the modified resistive output.

12. The interface of claim 11 wherein the logic circuit further includes:

a second input from a second amplifier, where the second amplifier measures a resistor voltage of a resistor having a first resistance,

where the logic circuit calculates a FET current using the first resistance and the resistor voltage from the second input, calculates a FET resistance using the FET voltage from the from the first input and the FET current, compares the FET resistance to the modified resistive output and applies a difference between the FET resistance and the modified resistive output as a negative feedback to the gate.

13. A temperature probe comprising:

a temperature sensor having a resistive output,

a processor for determining a modified resistive output for the temperature sensor, the processor being programmed to execute a predictive or a correlative algorithm, and

a FET for providing the modified resistive output in response to a signal from the processor,

wherein the processor includes an output and the FET includes a gate, where the output of the processor controls the gate of the FET such that the FET provides a FET resistance corresponding to the modified resistive output.

14. temperature probe of claim 13 wherein the processor further includes:

a first input from a first amplifier, where the first amplifier measure a FET voltage of the FET, and

a second input from a second amplifier, where the second amplifier measures a resistor voltage of a resistor having a first resistance,

where the processor calculates a FET current using the first resistance and the resistor voltage from the second input, calculates a FET resistance using the FET voltage from the first input and the FET current, compares the FET resistance to the modified resistive output and applies a difference between the FET resistance and the modified resistive output as a negative feedback to the gate.