Archive and restore system and methodology for on-line edits utilizing non-volatile buffering

• US 7,487,316 B1
• Filed: 09/17/2001
• Issued: 02/03/2009
• Est. Priority Date: 09/17/2001
• Status: Active Grant

• Current Assignee: Rockwell Automation Technologies Incorporated (Allen-Bradley Co., Inc.)
• Original Assignee: Rockwell Automation Technologies Incorporated (Allen-Bradley Co., Inc.)
• Inventors: Rischar, Charles M., Hall, Kenwood Henry, Schultz, Ronald E.
• Primary Examiner(s): Portka; Gary J
• Assistant Examiner(s): Chery; Mardochee
• Application Number:
  US09/954,367
• Time in Patent Office: 2,696 Days
• Field of Search: 711/4, 711/103, 711/104, 711/111, 711/161, 711/173, 711/209, 711/168, 711/154, 709/217, 713/320, 714/21, 714/24, 714/22, 710/19, 710/20, 710/21, 700/87
• US Class Current: 711/168
• CPC Class Codes: G05B 19/058 Safety, monitoring
• CPC Class Codes: G05B 2219/14141 Restart
• CPC Class Codes: G05B 2219/24137 Non volatile memory to store program on power loss
• CPC Class Codes: G06F 1/30 Means for acting in the event of power-supply failure or interruption, e.g. power-supply fluctuations for resetting only G06F1/24
• CPC Class Codes: G06F 11/1441 Resetting or repowering

Abstract

The present invention relates to a system and methodology to mitigate memory current requirements in an industrial controller and to facilitate efficient on-line editing, storage and retrieval of user programs and data. A segmented memory architecture is provided, wherein a first memory segment is loaded with programmed instructions and other data that is relatively static in nature. A second memory segment is provided for storage of dynamic information such as controller data table variables that change frequently and/or rapidly during program execution of the controller. An execution memory is concurrently loaded with the user program to facilitate high performance program execution and to enable on-line edits of the user program during operation of the controller.

Claims

1. An industrial controller, comprising:

a first memory portion to provide persistent data storage to static portions of a user program, the first memory portion provides persistent data storage without employing an auxiliary power source to mitigate power supplied by the auxiliary power source and returns state of the user'"'"'s program in the event of a power loss;

a second memory portion employs the auxiliary power source to provide persistent data storage to dynamic portions associated with the user program, the second memory portion returns state of variables that are affected or operated upon by the user'"'"'s program; and

a volatile execution memory portion that loads an execution memory concurrently with the user program to facilitate program execution and to enable on-line edits of the user program during operation of the controller.

2. The system of claim 1, the execution memory portion is at least one of a Static Random Access Memory (SRAM) and a Static Dynamic Random Access Memory (SDRAM).

3. The system of claim 1, the first memory portion is at least one of a FLASH memory, an Electrically Erasable Programmable Read Only Memory (EEPROM), a hard drive, a floppy disk drive, and an updateable CD ROM.

4. The system of claim 1, the second memory portion is at least one of a Static Random Access Memory (SRAM) and a Static Dynamic Random Access Memory (SDRAM).

5. The system of claim 1, the auxiliary power source is at least one of a battery, a capacitor, and uninterruptible power supply (UPS).

6. The system of claim 1, further comprising a write detector to determine when changes are being attempted on the user'"'"'s program.

7. The system of claim 6, the write detector is at least one of a Memory Protection Unit (MPU) and a Memory Management Unit (MMU).

8. The system of claim 1, further comprising a processor to execute the user program and to execute one or more routines to facilitate archival and retrieval of the user program in the first memory portion, the processor comprising at least one of a microprocessor, a micro-controller, an Application Specific Integrated Circuit (ASIC), a Digital Signal Processor (DSP), and a processor array.

9. The system of claim 8, the one or more routines further comprising at least one of a power-up routine, a background routine, and an abort routine to facilitate archival and retrieval of the user program.

10. The system of claim 1, the first memory portion further comprising an initial user program and an edit log that describes the most recent state of the user program.

11. The system of claim 10, the edit log further comprising at least one of a first log portion, a second log portion and a buffer to mitigate delays in programming the first memory portion.

12. The system of claim 11, the respective log portions further comprising at least one of a byte indicator, a half word indicator, a word indicator and a block indicator.

13. The system of claim 12, the respective indicators associated with at least one of an address portion, a position, a bit size, and a block size.

14. The system of claim 10, the initial user program stored in one or more segments, the segments comprising 1 to M data blocks, M being an integer.

15. The system of claim 14, the second memory portion storing 1 to N data blocks that correspond with the 1 to M data blocks of the first memory portion, N being an integer.

16. The system of claim 15, the execution memory portion is updated with contents of the 1 to M data blocks that reflects the initial user program and contents of the edit log that reflects changes to the initial user program in order to provide the most recent state of the user program in the execution memory portion.

17. The system of claim 16, the second memory portion including flags to facilitate transfer of data between the first memory portion and the execution memory portion.

18. The system of claim 17, the flags including at least one of a log status, a most recent log indication, a current buffer indication, and a clear log in progress indication.

19. A method to facilitate program storage and retrieval for an industrial controller, comprising:

segmenting static portions of a program in a persistent memory, the static portion facilitates storage and retrieval of state of the program during power loss to the controller;

loading an execution memory concurrently with the static portions of a program to enable on-line edits of the program during operation of the controller; and

segmenting variable portions of the program in an auxiliary-powered memory, the variable portion facilitates storage and retrieval of state of variables that are affected or operated upon by the program, the segmentation of the static and variable portions of the program mitigates memory current requirements of the industrial controller during power loss to the controller.

20. The method of claim 19, further comprising:

playing back a log to update the execution memory with recent changes to the program; and

detecting a write to the execution memory to update the log with the recent changes to the program.

21. The method of claim 20, further comprising updating the persistent memory from contents of the execution memory during background operations to mitigate delays associated with the update.

22. The method of claim 20, further comprising initiating an abort routine to update the log and the execution memory, the abort routine initiated by detecting the write to the execution memory.

23. The method of claim 22, further comprising at least one of:

determining if a recent log has adequate storage capacity;

writing an attempted edit to the recent log; and

updating the execution memory with the attempted edit.

24. The method of claim 22, further comprising at least one of:

determining if an older log is clear;

switching a pointer to a different log; and

initiating a background operation to clear the older log.

25. A system to facilitate program storage and retrieval for an industrial controller, comprising:

means for storing static portions of a program to be retrieved by the controller the static portion facilitates storage and retrieval of state of the program during power loss to the controller;

means for storing variable portions of the program operable by the controller, the variable portion facilitates storage and retrieval of state of variables that are affected or operated upon by the program, the means for storing the static and variable portions of the program supplied by different storage means to mitigate memory current requirements of the industrial controller during power loss to the controller;

means for loading execution memory concurrently with the static portions of a program;

means for executing the static portion of the program that is retrieved by the controller; and

means for enabling on-line edits of the program during operation of the controller.

26. An industrial controller, comprising:

a first memory segment to provide persistent data storage to a first portion of a user program, the first memory segment provides persistent data storage without employing a battery power source to mitigate power supplied by the battery power source and returns state of the user'"'"'s program in the event of a power loss;

a second memory segment employs the battery power source to provide persistent data storage to a second portion of the user'"'"'s program, the second memory portion returns state of variables that are affected or operated upon by the user'"'"'s program; and

an execution memory segment that loads an execution memory concurrently with the user program to facilitate program execution and to enable on-line edits of the user program during operation of the controller.