Users registers in a reconfigurable IC

• US 7,489,162 B1
• Filed: 12/01/2005
• Issued: 02/10/2009
• Est. Priority Date: 12/01/2005
• Status: Expired due to Fees

• Current Assignee: Tahoe Research Limited (f/k/a Learndale Limited) (Vector Capital Corporation)
• Original Assignee: Tabula Incorporated
• Inventors: Schmit, Herman, Redgrave, Jason
• Primary Examiner(s): Le, Don P
• Application Number:
  US11/293,856
• Time in Patent Office: 1,167 Days
• Field of Search: 326 37- 47
• US Class Current: 326/38
• CPC Class Codes: H03K 19/17756 for partial configuration or partial reconfiguration
• CPC Class Codes: H03K 19/17758 for speeding up configuration or reconfiguration
• CPC Class Codes: H03K 19/1776 for memories

Abstract

Some embodiments provide a reconfigurable IC. This reconfigurable IC includes a set of reconfigurable circuits for reconfigurably performing a set of operations in more than one reconfiguration cycle. The reconfigurable IC also includes a set of reconfigurable circuits that perform a storage operation during one reconfiguration cycle and perform a non-storage operation during a second reconfiguration cycle. At least two of these reconfigurable circuits are communicatively coupled to operate as a data register during at least two reconfiguration cycles.

Claims

1. A reconfigurable integrated circuit (“

IC”

) comprising;

a plurality of reconfigurable circuits, each of the plurality of reconfigurable circuits for reconfigurably performing more than one operation in more than one reconfiguration cycle;

wherein a plurality of the reconfigurable circuits are first-type reconfigurable circuits that perform a storage operation during a first reconfiguration cycle and perform a non-storage operation during a second reconfiguration cycle;

wherein at least two first-type reconfigurable circuits are communicatively coupled to operate as a data register during at least two reconfiguration cycles.

2. The reconfigurable IC of claim 1, wherein a reconfiguration cycle is an operational cycle of the reconfigurable IC during which the configuration of a particular reconfigurable circuit can be different than the configuration of the particular reconfigurable circuit during another reconfiguration cycle.

3. The reconfigurable IC of claim 1, wherein at least one particular first-type reconfigurable circuit that is coupled to operate as a data register performs a storage operation during at least two consecutive reconfiguration cycles.

4. The reconfigurable IC of claim 1, wherein more than two first-type reconfigurable circuits are communicatively coupled to operate as a data register.

5. The reconfigurable IC of claim 1, wherein said first-type reconfigurable circuits are interconnect/storage circuits.

6. The reconfigurable IC of claim 1, wherein the data register operates at a data register cycle, wherein the data register cycle is longer than the reconfiguration cycle.

7. The reconfigurable IC of claim 6, wherein said first-type reconfigurable circuits are interconnect/storage circuit.

8. The reconfigurable IC of claim 7, wherein the reconfigurable IC can be reconfigured such that the operation of at least one of the interconnect/storage circuits utilized in a data register is implemented by using a first interconnect/storage circuit located at a first physical interconnect/storage location during a first reconfiguration cycle and using a second interconnect/storage circuit located at a second physical interconnect/storage location during a second reconfiguration cycle.

9. An electronics system comprising:

a reconfigurable integrated circuit (“

IC”

) comprising;

a plurality of reconfigurable circuits for configurably performing a set of operations in more than one reconfiguration cycle;

wherein a plurality of the reconfigurable circuits are first-type reconfigurable circuits that perform a storage operation during a first reconfiguration cycle and a non-storage operation during a second reconfiguration cycle;

wherein at least two first-type reconfigurable circuits are communicatively coupled to operate as a data register.

10. The electronics system of claim 9, wherein a reconfiguration cycle is an operational cycle of the reconfigurable IC during which the configuration of a particular reconfigurable circuit can be different than the configuration of the particular reconfigurable circuit during another reconfiguration cycle.

11. The electronics system of claim 9, wherein at least one particular first-type reconfigurable circuit that is coupled to operate as a data register performs a storage operation during at least two consecutive reconfiguration cycles.

12. The electronics system of claim 9, wherein more than two first-type reconfigurable circuits are communicatively coupled to operate as a data register.

13. The electronics system of claim 9, wherein said first-type reconfigurable circuits are interconnect/storage circuits.

14. The electronics system of claim 9, wherein the data register operates at a data register cycle, wherein the data register cycle is longer than the reconfiguration cycle.

15. The electronics system of claim 14, wherein said first-type reconfigurable circuits are interconnect/storage circuit.

16. The electronics system of claim 15, wherein the reconfigurable IC can be reconfigured such that the operation of at least one of the interconnect/storage circuits utilized in a data register is implemented by using a first interconnect/storage circuit located at a first physical interconnect/storage location during a first reconfiguration cycle and using a second interconnect/storage circuit located at a second physical interconnect/storage location during a second reconfiguration cycle.

17. The electronic system of claim 9 further comprising a non-volatile memory for storing configuration data and for supplying configuration data to the IC when the IC powers up.

18. The electronic system of claim 9, wherein the non-volatile memory and the IC are on different IC dies.

19. The electronic system of claim 9, wherein the non-volatile memory and the IC are on the same IC die.