Direct down-conversion mixer architecture

• US 7,489,916 B1
• Filed: 06/04/2003
• Issued: 02/10/2009
• Est. Priority Date: 06/04/2002
• Status: Active Grant

• Current Assignee: III Holdings 6, LLC
• Original Assignee: Sequoia Communications Corporation
• Inventors: Costa, Damian, Groe, John, Farias, Michael
• Primary Examiner(s): Lee, John J
• Application Number:
  US10/454,761
• Time in Patent Office: 2,078 Days
• Field of Search: 455/334, 455/313, 455/189.1, 455/323, 455/333, 455/266, 455/339, 455/34.1, 455/550.1, 455/130, 455/141, 455/164.2, 455/219, 455/232.1, 455/234.1, 455/260, 455/269, 375/322, 375/259, 375/285
• US Class Current: 455/315
• CPC Class Codes: H03D 2200/0025 Gain control circuits
• CPC Class Codes: H03D 2200/0043 Bias and operating point
• CPC Class Codes: H03D 2200/0047 Offset of DC voltage or frequency
• CPC Class Codes: H03D 7/145 using a combination of bipolar transistors and field-effect transistors
• CPC Class Codes: H03D 7/1458 Double balanced arrangements, i.e. where both input signals are differential
• CPC Class Codes: H03D 7/1491 Arrangements to linearise a transconductance stage of a mixer arrangement
• CPC Class Codes: H03D 7/165 at least two frequency changers being located in different paths, e.g. in two paths with carriers in quadrature combined with amplitude demodulation H03D1/2245, combined with angle demodulation H03D3/007; N-path filters H03H19/002
• CPC Class Codes: H04B 1/30 for homodyne or synchrodyne receivers demodulator circuits H03D1/22

Abstract

Direct down-conversion mixer. A direct down-conversion mixer is provided. The mixer comprises an LO switching pair coupled to receive an RF input signal and produce a down converted output signal. The mixer also comprises an integrator coupled to receive the output signal and produce an integrator output signal. The mixer also comprises a control circuit coupled to receive an input voltage and the integrator output signal to produce a control signal that is coupled to the LO switching pair.

Claims

1. A direct down-conversion mixer, comprising:

an LO switching pair coupled to receive an RF input signal and produce a down converted output signal;

an integrator coupled to receive the output signal and produce an integrator output signal; and

a control circuit coupled to receive an LO input voltage and the integrator output signal to provide a control signal that is coupled to the LO switching pair so as to offset asymmetry in said LO switching pair, said control circuit comprising a second control circuit coupled to receive the integrator output signal and produce the control signal and a replica amplifier coupled to the second control circuit to receive the control signal.

2. The mixer of claim 1, wherein the control circuit further comprises an LO buffer coupled to the LO switching pair.

3. The mixer of claim 1, wherein the second control circuit comprises:

a comparator that is coupled to receive the integrator output signal, a reference signal and produce a comparator output signal; and

a digital to analog converter that has a digital output coupled to the replica amplifier.

4. The mixer of claim 3, wherein the second control circuit further comprises:

a gate that receives the comparator output and a clock signal to produce a gate output; and

a counter that is coupled to receive the gate output and produce a counter output that is coupled to the digital to analog converter.

5. The direct down-conversion mixer of claim 1, wherein the LO switching pair comprises a pair of bipolar junction transistors.

6. The direct down-conversion mixer of claim 1, wherein the LO switching pair comprises a pair of FET transistors.

7. The direct down-conversion mixer of claim 1, wherein said control circuit comprises a feedback circuit disposed to separate an LO input imbalance and an LO output imbalance and separately adjusts said LO input imbalance and said LO output imbalance to increase rejection of even-order distortion.

8. A direct down-conversion double balanced mixer, comprising:

a first LO switching pair coupled to receive an RF input signal and produce a first down converted output signal;

a second LO switching pair coupled to receive an RF input signal and produce a second down converted output signal;

a first integrator coupled to receive the first down converted output signal and produce a first integrator output signal;

a second integrator coupled to receive the second down converted output signal and produce a second integrator output signal;

a first control circuit coupled to receive a first LO input voltage and the first integrator output signal to provide a first control signal that is coupled to the first LO switching pair so as to offset asymmetry in said first LO switching pair; and

a second control circuit coupled to receive a second LO input voltage and the second integrator output signal to produce a second control signal that is coupled to the second LO switching pair.

9. A method of operating a direct down-conversion mixer, comprising:

receiving an RF signal at an LO switching pair to produce a down converted output signal;

receiving the output signal at an integrator to produce an integrator output signal; and

receiving an LO input voltage and the integrator output signal at a control circuit to produce a control signal that is coupled to the LO switching pair so as to offset asymmetry in said LO switching pair;

wherein the step of receiving the LO input voltage further comprises receiving the integrator output signal at a second control circuit that produces the control signal and receiving the control signal at a replica amplifier that is coupled to the second control circuit.

10. The method of claim 9 wherein said control circuit separates an LO input imbalance and an LO output imbalance and separately adjusts said LO input imbalance and said LO output imbalance to increase rejection of even-order distortion in said direct down-conversion mixer.

11. A direct down-conversion mixer, comprising:

an LO switching pair means for receiving an RF input signal to produce a down converted output signal;

an integrator means for receiving the output signal and producing an integrator output signal; and

a control circuit means for receiving an LO input voltage and the integrator output signal to produce a control signal that is coupled to the LO switching pair so as to offset asymmetry in said LO switching pair, said control circuit means comprising a second control circuit means for receiving the integrator output signal and producing the control signal and a replica amplifier means coupled to the second control circuit means for receiving the control signal.

12. The mixer of claim 11, wherein the second control circuit means comprises:

a comparator means for receiving the integrator output signal, a reference signal and producing a comparator output signal; and

a digital to analog converter means for producing a digital output that is coupled to the replica amplifier means.

13. The mixer of claim 12, wherein the second control circuit further comprises:

a gate means for receiving the comparator output and a clock signal to produce a gate output; and

a control means for receiving the gate output and producing a counter output that is coupled to the digital to analog converter.