Method and apparatus for evaluating and optimizing a signaling system

• US 7,490,275 B2
• Filed: 11/13/2006
• Issued: 02/10/2009
• Est. Priority Date: 02/02/2001
• Status: Expired due to Fees

• Current Assignee: Rampart Asset Management LLC
• Original Assignee: Rambus Inc.
• Inventors: Zerbe, Jared, Chau, Pak Shing, Stonecypher, William Franklin
• Primary Examiner(s): Ton; David
• Application Number:
  US11/559,111
• Publication Number:
  US 20070064510A1
• Time in Patent Office: 820 Days
• Field of Search: 713/400, 375/224, 709/223, 714/715, 714/739, 702/189
• US Class Current: 714/715
• CPC Class Codes: G01R 31/31703 Comparison aspects, e.g. signature analysis, comparators concerning scan tests G01R31/318566; concerning testers G01R31/3193
• CPC Class Codes: G01R 31/31713 Input or output interfaces for test, e.g. test pins, buffers for scan test G01R31/318572
• CPC Class Codes: G01R 31/31716 Testing of input or output with loop-back
• CPC Class Codes: G01R 31/31717 Interconnect testing by scan techniques see G01R31/31855
• CPC Class Codes: G01R 31/3183 Generation of test inputs, e.g. test vectors, patterns or sequences
• CPC Class Codes: G01R 31/31855 Interconnection testing, e.g. crosstalk, shortcircuits
• CPC Class Codes: G01R 31/318577 AC testing, e.g. current testing, burn-in
• CPC Class Codes: G01R 31/3187 Built-in tests
• CPC Class Codes: G06F 11/221 to test buses, lines or interfaces, e.g. stuck-at or open line faults
• CPC Class Codes: G06F 11/26 Functional testing
• CPC Class Codes: G06F 13/423 with synchronous protocol
• CPC Class Codes: G11C 29/02 Detection or location of defective auxiliary circuits, e.g. defective refresh counters
• CPC Class Codes: G11C 29/022 in I/O circuitry
• CPC Class Codes: G11C 29/025 in signal lines
• CPC Class Codes: G11C 29/40 using compression techniques
• CPC Class Codes: H04B 1/04 Circuits
• CPC Class Codes: H04B 1/16 Circuits
• CPC Class Codes: H04B 17/0085 using test signal generators
• CPC Class Codes: H04B 3/32 Reducing cross-talk, e.g. by compensating
• CPC Class Codes: H04L 1/0001 Systems modifying transmission characteristics according to link quality, e.g. power backoff adaptive data allocation for multicarrier modulation H04L5/0044; controlling transmission power for radio systems H04W52/04
• CPC Class Codes: H04L 1/242 : by comparing a transmitted test signal with a locally generated replica
• CPC Class Codes: H04L 1/243 : at the transmitter, using a loop-back
• CPC Class Codes: H04L 1/244 : test sequence generators
• CPC Class Codes: H04L 25/03885 : adaptive
• CPC Class Codes: H04L 5/1438 : Negotiation of transmission parameters prior to communication modified according to link quality H04L1/0001

Abstract

A method and apparatus for evaluating and optimizing a signaling system is described. A pattern of test information is generated in a transmit circuit of the system and is transmitted to a receive circuit. A similar pattern of information is generated in the receive circuit and used as a reference. The receive circuit compares the patterns. Any differences between the patterns are observable. In one embodiment, a linear feedback shift register (LFSR) is implemented to produce patterns. An embodiment of the present disclosure may be practiced with various types of signaling systems, including those with single-ended signals and those with differential signals. An embodiment of the present disclosure may be applied to systems communicating a single bit of information on a single conductor at a given time and to systems communicating multiple bits of information on a single conductor simultaneously.

Claims

1. A method for evaluating a digital signaling system comprising the steps of:

generating a transmit repeating pattern in a transmit circuit;

transmitting the transmit repeating pattern to a receive circuit;

generating a receive repeating pattern in the receive circuit;

comparing the transmitted transmit repeating pattern to the receive repeating pattern in a test mode to obtain a comparison; and

adjusting a parameter affecting reception of the transmit repeating pattern at the receive circuit to evaluate how the digital signaling system operates in a normal mode with the adjusted parameter.

2. The method of claim 1, wherein the parameter is a termination setting.

3. The method of claim 1, wherein the parameter is a transmit clock offset.

4. The method of claim 1, wherein the parameter is a receive clock offset.

5. The method of claim 1, wherein the parameter is an input receiver window.

6. The method of claim 1, wherein the parameter is an output drive level.

7. The method of claim 1, wherein the parameter is a crosstalk cancellation coefficient.

8. The method of claim 1, wherein the parameter is an equalization coefficient.

9. The method of claim 1, wherein the step of generating a transmit repeating pattern in a transmit circuit comprises the step of:

utilizing a shift register to generate the transmit repeating pattern.

10. The method of claim 9, wherein the step of utilizing a shift register to generate the transmit repeating pattern comprises the step of:

utilizing a linear feedback shift register to generate the transmit repeating pattern.

11. The method of claim 1, wherein the step of transmitting the transmit repeating pattern to the receive circuit further comprises the step of:

transmitting the transmit repeating pattern as a signal referenced to a ground.

12. The method of claim 1, wherein the step of transmitting the transmit repeating pattern to the receive circuit further comprises the step of:

transmitting the transmit repeating pattern as a differential signal over a pair of conductors.

13. The method of claim 1, wherein the step of transmitting the transmit repeating pattern to the receive circuit further comprises the step of:

transmitting the transmit repeating pattern by encoding two bits of information on a single conductor simultaneously.

14. The method of claim 1, further comprising the step of:

setting the parameter affecting reception of the transmit repeating pattern at the receive circuit.

15. The method of claim 1, wherein the step of adjusting the parameter affecting reception of the transmit repeating pattern at the receive circuit is repeated over a range of values of the parameter.

16. The method of claim 15, wherein the steps of transmitting the transmit repeating pattern to the receive circuit and comparing the transmitted transmit repeating pattern to the receive repeating pattern in a test mode to obtain a comparison are repeated after the step of adjusting the parameter affecting reception of the transmit repeating pattern at the receive circuit is performed.

17. The method of claim 16, further comprising the step of:

constructing a representation of a waveform based on the comparison.

18. The method of claim 1, further comprising the step of:

selecting a value of the parameter so as to optimize reception at the receive circuit of a transmit data output signal transmitted by the transmit circuit.

19. The method of claim 18, wherein the transmit repeating pattern and the transmit data output signal are communicated from the transmit circuit to the receive circuit over a common medium.