Method and apparatus for controlling a circuit with a high voltage sense device
First Claim
1. A method of fabricating a voltage sense device, comprising:
- forming a first doped region in a well included in a substrate;
forming a second doped region in the substrate outside of the well;
forming a third doped region in the well;
coupling a first terminal to the well via the first doped region;
coupling a second terminal to the substrate via the second doped region; and
coupling a third terminal to the well via the third doped region, wherein a voltage output by the voltage sense device at the third terminal is substantially proportional to a voltage between the first and second terminals when the voltage between the first and second terminals is less than a pinch-off voltage of the voltage sense device, wherein the voltage output by the voltage sense device at the third terminal is substantially constant and less than the voltage between the first and second terminals when the voltage between the first and second terminals is greater than the pinch-off voltage of the voltage sense device.
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Abstract
A control circuit with a high voltage sense device. In one embodiment, a circuit includes a first transistor disposed in a first substrate having first, second and third terminals. A first terminal of the first transistor is coupled to an external voltage. A voltage provided at a third terminal of the first transistor is substantially proportional to a voltage between the first and second terminals of the first transistor when the voltage between the first and second terminals of the first transistor is less than a pinch-off voltage of the first transistor. The voltage provided at the third terminal of the first transistor is substantially constant and less than the voltage between the first and second terminals of the first transistor when the voltage between the first and second terminals of the first transistor is greater than the pinch-off voltage of the first transistor. The circuit also includes a control circuit disposed in the first substrate and coupled to the third terminal of the first transistor. The circuit further includes a second transistor disposed in a second substrate. A first terminal of the second transistor coupled to the external voltage.
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Citations
16 Claims
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1. A method of fabricating a voltage sense device, comprising:
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forming a first doped region in a well included in a substrate; forming a second doped region in the substrate outside of the well; forming a third doped region in the well; coupling a first terminal to the well via the first doped region; coupling a second terminal to the substrate via the second doped region; and coupling a third terminal to the well via the third doped region, wherein a voltage output by the voltage sense device at the third terminal is substantially proportional to a voltage between the first and second terminals when the voltage between the first and second terminals is less than a pinch-off voltage of the voltage sense device, wherein the voltage output by the voltage sense device at the third terminal is substantially constant and less than the voltage between the first and second terminals when the voltage between the first and second terminals is greater than the pinch-off voltage of the voltage sense device. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8)
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9. A voltage sense device, comprising:
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a substrate including a well formed in the substrate; a first doped region disposed in the well; a second doped region disposed in the substrate outside of the well; a third doped region disposed in the well; a first terminal coupled to the well via the first doped region; a second terminal coupled to the substrate via the second doped region; and a third terminal coupled to the well via the third doped region, wherein a voltage output by the voltage sense device at the third terminal is substantially proportional to a voltage between the first and second terminals when the voltage between the first and second terminals is less than a pinch-off voltage of the voltage sense device, wherein the voltage output by the voltage sense device at the third terminal is substantially constant and less than the voltage between the first and second terminals when the voltage between the first and second terminals is greater than the pinch-off voltage of the voltage sense device. - View Dependent Claims (10, 11, 12, 13, 14, 15, 16)
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Specification