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Method and apparatus for detecting an error in a bit sequence

  • US 7,493,530 B2
  • Filed: 06/25/2003
  • Issued: 02/17/2009
  • Est. Priority Date: 06/25/2002
  • Status: Active Grant
First Claim
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1. A bit error detection circuit comprising:

  • a predictor circuit that uses a plurality of bits of a bit sequence to predict a next bit in the sequence;

    a comparator circuit that compares an actual next bit in the sequence with the predicted next bit to determine whether there is any error in the actual next bit; and

    a correction circuit that corrects any error in the actual next bit to provide a corrected actual next bit; and

    a trigger circuit that, in response to an error in the actual next bit indicating presence of an erroneous bit in the predictor circuit, disables the correction circuit until the predictor circuit no longer contains erroneous bits.

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