Statically speculative compilation and execution
First Claim
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1. A method for use with a compiler architecture framework, the method comprising:
- performing a statically speculative compilation process on a computer program to extract speculative static information;
encoding the speculative static information in an instruction set architecture of a processor in order to affect power consumption of a processor resource during use of the processor resource, the speculative static information identifying an access path of the processor resource; and
executing a compiled computer program in the processor using the speculative static information encoded in the instruction set architecture, wherein executing comprises using the access path at run time to reduce resource power consumption for an individual use of the processor resource.
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Abstract
A system, for use with a compiler architecture framework, includes performing a statically speculative compilation process to extract and use speculative static information, encoding the speculative static information in an instruction set architecture of a processor, and executing a compiled computer program using the speculative static information, wherein executing supports static speculation driven mechanisms and controls.
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Citations
30 Claims
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1. A method for use with a compiler architecture framework, the method comprising:
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performing a statically speculative compilation process on a computer program to extract speculative static information; encoding the speculative static information in an instruction set architecture of a processor in order to affect power consumption of a processor resource during use of the processor resource, the speculative static information identifying an access path of the processor resource; and executing a compiled computer program in the processor using the speculative static information encoded in the instruction set architecture, wherein executing comprises using the access path at run time to reduce resource power consumption for an individual use of the processor resource. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18)
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19. A processing device comprising:
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machine storage for storing a compiler that is configured to compile a computer program, the compiler being configured to extract speculative static information about the computer program during compilation, to use the speculative static information in a tagless cache system in order to affect power consumption of a cache during use of the cache, the speculative static information being usable to predict access paths for cache accesses at run time; and the tagless cache system that is accessible based on the extracted speculative static information, wherein individual cache accesses predicted using the speculative static information contribute to reduction in cache power and processing device energy consumption. - View Dependent Claims (20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30)
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Specification