Asymmetrical switching delay compensation in display systems

• US 7,499,065 B2
• Filed: 06/11/2004
• Issued: 03/03/2009
• Est. Priority Date: 06/11/2004
• Status: Active Grant

• Current Assignee: Texas Instruments, Inc.
• Original Assignee: Texas Instruments, Inc.
• Inventors: Richards, Peter
• Primary Examiner(s): Shalwala; Bipin
• Assistant Examiner(s): Holton; Steven E
• Application Number:
  US10/865,993
• Publication Number:
  US 20050275643A1
• Time in Patent Office: 1,726 Days
• Field of Search: 345690-693, 345 84- 86
• US Class Current: 345/693
• CPC Class Codes: G09G 2320/0285 using tables for spatial correction of display data
• CPC Class Codes: G09G 3/2014 by modulation of the duration of a single pulse during which the logic level remains constant
• CPC Class Codes: G09G 3/2044 using dithering
• CPC Class Codes: G09G 3/346 based on modulation of the reflection angle, e.g. micromirrors micromirrors devices per se G02B26/0833

Abstract

A method and apparatus of the present invention is particularly for use in display systems having spatial light modulators in which the pixels present asymmetrical switching delays. For a desired illumination intensity of a pixel, a series of pulse-width-modulation bit values for the pixel is determined based at least in part upon a parameter that characterizes the asymmetrical transition behavior of the pixel between states.

Claims

1. A method of operating an array of pixels to generate an image using a pulse-width-modulation (PWM) technique, wherein each pixel has an asymmetric switching delay between an ON and OFF state, the method comprising:

assigning a set of nominal weights to a set of bits corresponding to the PWM pattern of a pixel;

providing a desired intensity value to be reproduced by the pixel;

determining the values of a first subset of bits according to the desired intensity such that the bits in the first set collectively present an intensity that approximates the desired intensity value;

determining a residual intensity value based on the desired intensity value, the determined values of the first subset of bits and their corresponding nominal weights, and a parameter that characterizes the asymmetry of the pixel switching delay;

determining the values of a second subset of bits depending on the residual intensity value, the parameter characterizing the asymmetry of the switching delay, the values and weights of the first subset of bits, and a dither threshold value; and

operating the pixels with the PWM technique according to the determined bit values of the first and second subsets.

2. The method of claim 1, wherein the pixel is a micromirror that comprises a reflective mirror plate that is operable to rotate into a plurality of different positions in response to an electrostatic field.

3. The method of claim 1, wherein the time difference between transitions are resulted from a difference between a response of the pixel to an external driving force from the ON state to the OFF state and a response of the pixel to another force from the OFF state to the ON state.

4. The method of claim 1, wherein the time difference is resulted from an operation of a set of optical elements of the display system.

5. The method of claim 1, wherein the pixel is a micromirror having a reflective deflectable mirror plate held on a substrate;

and wherein the OFF state corresponds to the mirror plate at a position parallel to the substrate.

6. The method of claim 1, wherein the bits in the first and second subsets have different weighting schemes.

7. The method of claim 6, wherein the bits in the first subset comply with a binary weighting scheme.

8. The method of claim 6, wherein the bits in the first subset comply with a non-binary weighting scheme.

9. The method of claim 6, wherein the bits in the second subset comply with a binary weighting scheme.

10. The method of claim 6, wherein the bits in the second subset comply with a non-binary weighting scheme.

11. The method of claim 1, wherein the parameter that characterizes the switching delay is a difference between a transition time of the pixel from the OFF state to the ON state and a transition time of the pixel from the ON state to the OFF state.

12. The method of claim 11, wherein the step of determining the value for each bit in the first subset further comprises:

determining a value for each bit in the first subset such that the bits of the first subset collectively approximates the desired luminance intensity;

setting a value of each bit in the second subset to zero; and

calculating the effective luminance intensity based on the determined bits of the first subset and the parameters characterizing the switching delay.

13. The method of claim 12, wherein the step of calculating the effective luminance intensity further comprises:

calculating the effective luminance by adding up the weights of the ON state bits in the first subset; and

subtracting the effective luminance intensity by a production of a total number of transitions between the ON and Off state and the difference between the transitions intervals.

14. The method of claim 12, wherein the step of determining the value for each bit of the second subset further comprises:

defining an effective weight for each bit of the second subset so as to obtain a first bit pattern of the bits in the second subset; and

determining a first effective residual luminance intensity according to the first bit pattern of the bits in the second subset such that the first effective residual luminance intensity approximates a residual luminance intensity that is a difference between the desired luminance intensity and the effective luminance intensity.

15. The method of claim 14, wherein the first effective residual luminance intensity is less than the residual luminance intensity.

16. The method of claim 14, further comprising:

calculating a second bit pattern of the bits in the second subset by adding the first bit pattern by 1 (one);

calculating a second effective residual luminance intensity from the second bit pattern of the bits in the second subset; and

dithering the bits in the second subset between the first and second effective luminance intensities.

17. The method of claim 16, wherein the step of dithering the bits in the second subset group further comprises:

determining a dithering scaling coefficient that is a difference between the first and second effective residual luminance intensities; and

scaling a dithering matrix entry to match a step size of the bits in the second subset; and

determining an output bit pattern of the bits in the second subset based on a threshold criterion.

18. The method of claim 17, wherein the threshold criterion states that, the output bit pattern of the bits in the second subset is the first bit pattern when the difference between the effective residual luminance intensity is larger than the step size;

and the output bit pattern of the bits in the second subset is the second bit pattern when the difference between the effective residual luminance intensity is smaller or equal to the step size.

19. The method of claim 1, further comprising:

determining a weighting scheme for the bits in each subset such that a carrier created in the second subset does not effect the values of the bits in the first subset.

20. A device for controlling the operation of an array of pixels to generate an image using a pulse-width-modulation (PWM) technique, wherein each pixel has an asymmetric switching delay between an ON and OFF state, the device comprising:

a set of data bits corresponding to a PWM pattern of a pixel with the data bits assigned with a set of nominal weights;

a means for determining a value for each bit of a first subset of the data bits according to a desired intensity such that the bits in the first subset collectively present an intensity that approximates the desired intensity value;

a means for determining a residual intensity value based on the desired intensity value, the determined values of the first subset of bits and their corresponding nominal weights, and a parameter that characterizes the asymmetry of the pixel switching delay;

a means for determining the values of a second subset of bits depending on the residual intensity value, the parameter characterizing the asymmetry of the switching delay, the values and weights of the first subset of bits, and a dither threshold value; and

a means for operating the pixels with the PWM technique according to the determined bit values of the first and second subsets.

21. The device of claim 20, wherein the bits in the first and second subsets have different weighting schemes.

22. The device of claim 21, wherein the bits in the first subset comply with a binary weighting scheme.

23. The device of claim 21, wherein the bits in the first subset comply with a non-binary weighting scheme.

24. The device of claim 21, wherein the bits in the second subset comply with a binary weighting scheme.

25. The device of claim 21, wherein the bits in the second subset comply with a non-binary weighting scheme.

26. The device of claim 20, wherein the parameter that characterizes the switching delay is a difference between a transition time of the pixel from the OFF state to the ON state and a transition time of the pixel from the ON state to the OFF state.

27. The device of claim 26, wherein the means for determining the value for each bit in the first subset further comprises:

a means for determining a value for each bit in the first subset such that the bits of the first subset collectively approximate the desired luminance intensity;

a means for setting a value of each bit in the second subset to zero; and

a means for calculating the effective luminance intensity based on the determined bits of the first subset and the parameters characterizing the switching delay.

28. The device of claim 27, wherein the means for calculating the effective luminance intensity further comprises:

a means for calculating the effective luminance by adding up the weights of the ON state bits in the first subset; and

a means for subtracting the effective luminance intensity by a production of a total number of transitions between the ON and Off state and the difference between the transitions intervals.

29. The device of claim 27, wherein the means for determining the value for each bit of the second subset further comprises:

a means for defining an effective weight for each bit of the second subset so as to obtain a first bit pattern of the bits in the second subset; and

a means for determining a first effective residual luminance intensity according to the first bit pattern of the bits in the second subset such that the first effective residual luminance intensity approximates a residual luminance intensity that is a difference between the desired luminance intensity and the effective luminance intensity.

30. The device of claim 29, wherein the first effective residual luminance intensity is less than the residual luminance intensity.

31. The device of claim 29, further comprising:

a means for calculating a second bit pattern of the bits in the second subset by adding the first bit pattern by 1 (one);

a means for calculating a second effective residual luminance intensity from the second bit pattern of the bits in the second subset; and

a means for dithering the bits in the second subset between the first and second effective luminance intensities.

32. The device of claim 31, wherein the means for dithering the bits in the second subset further comprises:

a means for determining a dithering scaling coefficient that is a difference between the first and second effective residual luminance intensities; and

a means for scaling a dithering matrix entry to match a step size of the bits in the second subset; and

a means for determining an output bit pattern of the bits in the second subset based on a threshold criterion.

33. The device of claim 32, wherein the threshold criterion states that, the output bit pattern of the bits in the second subset is the first bit pattern when the difference between the effective residual luminance intensity is larger than the step size;

and the output bit pattern of the bits in the second subset is the second bit pattern when the difference between the effective residual luminance intensity is smaller or equal to the step size.

34. The device of claim 20, further comprising:

a means for determining a weighting scheme for the bits in each subset such that a carrier created in the second subset does not effect the values of the bits in the first subset.

35. A projection system for displaying an image using a pulse-width-modulation (PWM) technique, the device comprising:

an illumination system providing light for the system;

an array of pixels, each of which operates between an ON state and an OFF state for modulating light from the light source into different spatial directions, and wherein each pixel has an asymmetrical switching delay between an ON state and an OFF state;

a controller that controls an operation of the pixel array and the illumination system, further comprising;

a set of data bits corresponding to a PWM pattern of a pixel with the data bits assigned with a set of nominal weights;

a means for determining a value for each bit of a first subset of the data bits according to a desired intensity such that the bits in the first subset collectively present an intensity that approximates the desired intensity value;

a means for determining a residual intensity value based on the desired intensity value, the determined values of the first subset of bits and their corresponding nominal weights, and a parameter that characterizes the asymmetry of the pixel switching delay;

a means for determining the values of a second subset of bits depending on the residual intensity value, the parameter characterizing the asymmetry of the switching delay, the values and weights of the first subset of bits, and a dither threshold value; and

a means for operating the pixels with the PWM technique according to the determined bit values of the first and second subsets; and

a projection lens for collecting the modulated light and projecting the modulated light onto a display target.

36. The projection system of claim 35, wherein the bits in the first and second subsets have different weighting schemes.

37. The projection system of claim 36, wherein the bits in the first subset comply with a binary weighting scheme.

38. The projection system of claim 36, wherein the bits in the first subset comply with a non-binary weighting scheme.

39. The projection system of claim 36, wherein the bits in the second subset comply with a binary weighting scheme.

40. The projection system of claim 36, wherein the bits in the second subset comply with a non-binary weighting scheme.

41. The projection system of claim 35, wherein the parameter that characterizes the switching delay is a difference between a transition time of the pixel from the OFF state to the ON state and a transition time of the pixel from the ON state to the OFF state.

42. The projection system of claim 41, wherein the means for determining the value for each bit in the first subset comprises:

a means for determining a value for each bit in the first subset such that the bits of the first subset collectively approximates the desired luminance intensity;

a means for setting a value for each bit in the second subset to zero; and

a means for calculating the effective luminance intensity based on determined bits of the first subset and the parameters characterizing the switching delay.

43. The projection system of claim 42, wherein the means for calculating the effective luminance intensity further comprises:

a means for calculating the effective luminance by adding up the weights of the ON state bits in the first subset; and

a means for subtracting the effective luminance intensity by a production of a total number of transitions between the ON and Off state and the difference between the transitions intervals.

44. The projection system of claim 42, wherein the means for determining the value for each bit of the second subset further comprises:

a means for defining an effective weight for each bit of the second subset so as to obtain a first bit pattern of the bits in the second subset; and

a means for determining a first effective residual luminance intensity according to the first bit pattern of the bits in the second subset such that the first effective residual luminance intensity approximates a residual luminance intensity that is a difference between the desired luminance intensity and the effective luminance intensity.

45. The projection system of claim 44, wherein the first effective residual luminance intensity is less than the residual luminance intensity.

46. The projection system of claim 44, further comprising:

a means for calculating a second bit pattern of the bits in the second subset by adding the first bit pattern by 1 (one);

a means for calculating a second effective residual luminance intensity from the second bit pattern of the bits in the second subset; and

a means for dithering the bits in the second subset between the first and second effective luminance intensities.

47. The projection system of claim 46, wherein the means for dithering the bits in the second subset further comprises:

a means for determining a dithering scaling coefficient that is a difference between the first and second effective residual luminance intensities; and

a means for scaling a dithering matrix entry to match a step size of the bits in the second subset; and

a means for determining an output bit pattern of the bits in the second subset based on a threshold criterion.

48. The projection system of claim 47, wherein the threshold criterion states that, the output bit pattern of the bits in the second subset is the first bit pattern when the difference between the effective residual luminance intensity is larger than the step size;

and the output bit pattern of the bits in the second subset is the second bit pattern when the difference between the effective residual luminance intensity is smaller or equal to the step size.

49. The projection system of claim 35, further comprising:

a means for determining a weighting scheme for the bits in each subset such that a carrier created in the second subset does not effect the values of the bits in the first subset.

50. The projection system of claim 35, wherein the illumination system comprises:

a light source providing white light;

a light pipe for directing the light from the light source onto the pixel array; and

a color wheel.

51. The projection system of claim 35, wherein the pixel array is a micromirror array that comprises an array of micromirrors.

52. The projection system of claim 51, wherein each micromirror of the micromirror array comprises:

a substrate;

a hinge held on the substrate; and

a reflective deflectable mirror plate attached to the hinge such that the mirror plate can rotate above the substrate.

53. The projection system of claim 52, wherein each micromirror comprises an ON state electrode and an OFF state electrode, wherein the ON state electrode drives the mirror plate to rotate towards the ON state, and the OFF state electrode drives the mirror plate to rotate towards the OFF state.

54. The projection system of claim 52, further comprising:

an electrode disposed at a location proximate to the mirror plate such than an electrostatic field can be established between the mirror plate and the electrode for rotating the mirror plate.

55. The projection system of claim 52, wherein the mirror plate and the hinge are formed on separate planes each of which parallel to the substrate.

56. The projection system of claim 54, wherein the electrode is formed on the substrate on which the hinge and the mirror plate are formed.

57. The projection system of claim 54, wherein the electrode is formed on a separate substrate than the substrate on which the mirror plate and the hinge are formed.