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Flash memory cell arrays having dual control gates per memory cell charge storage element

  • US 7,502,261 B2
  • Filed: 04/17/2006
  • Issued: 03/10/2009
  • Est. Priority Date: 10/28/2002
  • Status: Expired due to Term
First Claim
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1. A non-volatile memory for programming and reading data, comprising:

  • a plurality of charge storage elements arranged in rows and columns across a semiconductor substrate,a plurality of control gate lines extending across the charge storage elements in a manner that opposing sidewalls on opposite sides of individual charge storage elements are capacitively coupled with at least two of the control gate lines, anda decoder and voltage supply connected to the control gate lines to couple controlled voltages to the charge storage elements capacitively coupled therewith during programming data thereto and reading data therefrom.

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