Method for sensing a signal in a two-terminal memory array having leakage current
First Claim
1. A method for sensing current in a two-terminal memory, comprising:
- providing an array including a plurality of first conductive traces and a plurality of second conductive traces;
receiving an address operative to select one of the plurality of first conductive traces and one of the plurality of second conductive traces;
applying a select voltage across the selected first and second conductive traces;
applying a non-select voltage potential to unselected first and second conductive traces;
sensing a total current flowing through the selected first conductive trace; and
sensing a leakage current flowing through unselected second conductive traces.
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Accused Products
Abstract
A two-terminal memory array includes a plurality of first and second conductive traces. An address unit operatively applies a select voltage across a selected pair of the first and second conductive traces and applies a non-select voltage potential to unselected traces. A total current flowing in the selected first conductive trace and a leakage current flowing through unselected second conductive traces are sensed by a sense unit in a one cycle or a two cycle pre-read operation. The total and leakage currents can be combined with a reference signal to derive a data signal indicative of one of a plurality of conductivity profiles that represent stored data. The conductivity profiles can be stored in a resistive state memory element that is electrically in series with the selected first and second conductive traces.
28 Citations
25 Claims
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1. A method for sensing current in a two-terminal memory, comprising:
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providing an array including a plurality of first conductive traces and a plurality of second conductive traces; receiving an address operative to select one of the plurality of first conductive traces and one of the plurality of second conductive traces; applying a select voltage across the selected first and second conductive traces; applying a non-select voltage potential to unselected first and second conductive traces; sensing a total current flowing through the selected first conductive trace; and sensing a leakage current flowing through unselected second conductive traces. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21)
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22. A method for sensing current in a two-terminal memory, comprising:
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providing a plurality of bit-block arrays, each bit-block array including a plurality of first conductive traces and a plurality of second conductive traces; receiving an address operative to select one of the plurality of first conductive traces and one of the plurality of second conductive traces; applying a select voltage across the selected first and second conductive traces; applying a non-select voltage potential to unselected first and second conductive traces; sensing a total current flowing through the selected first conductive trace; and sensing a leakage current flowing through unselected second conductive traces. - View Dependent Claims (23)
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24. A method for sensing current in a two-terminal memory, comprising:
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providing an array including a plurality of first conductive traces and a plurality of second conductive traces; receiving an address operative to select one of the plurality of first conductive traces and one of the plurality of second conductive traces; alternating a polarity of a select voltage from a current polarity to a polarity that is opposite the current polarity; applying the select voltage across the selected first and second conductive traces; applying a non-select voltage potential to unselected first and second conductive traces; sensing a total current flowing through the selected first conductive trace; and sensing a leakage current flowing through unselected second conductive traces. - View Dependent Claims (25)
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Specification