Non manhattan floor plan architecture for integrated circuits

• US 7,506,295 B1
• Filed: 12/31/2002
• Issued: 03/17/2009
• Est. Priority Date: 12/31/2002
• Status: Expired due to Fees

• Current Assignee: Cadence Design Systems Incorporated (Cadence Group)
• Original Assignee: Cadence Design Systems Incorporated (Cadence Group)
• Inventors: Teig, Steven
• Primary Examiner(s): WHITMORE, STACY
• Application Number:
  US10/335,080
• Time in Patent Office: 2,268 Days
• Field of Search: 716/8, 716 12- 14
• US Class Current: 716/135
• CPC Class Codes: G06F 30/392 Floor-planning or layout, e.g. partitioning or placement
• CPC Class Codes: G06F 30/394 Routing G06F30/396 takes precedence
• CPC Class Codes: G06F 30/3947 global

Abstract

The present invention introduces methods of creating floor plans and placements for non Manhattan integrated circuits with existing electronic design automation tools. To create a floor plan, an existing Manhattan based floor planning tool is used. The die size for the floor plan is reduced to take into account the improved wiring density of non Manhattan wiring. A non Manhattan global router is then used on the floor plan to create pin placements. The floor plan may create a floor plan having circuit modules with beveled corners to take advantage of diagonal wiring. To create a placement, an existing Manhattan based placer is first used to create an initial placement. The initial placement is then processed by a non Manhattan aware post processor. The post processor performs local optimizations on the initial placement to improve the placement for a non Manhattan routed integrated circuit.

Claims

1. A layout for an integrated circuit (“

IC”

), the layout stored on a computer readable medium, wherein said layout is used in a process for designing the IC, said layout comprising;

a first circuit module that is a geometric representation of a first circuit component of the IC, wherein said first circuit module comprises a shape of a modified first parallelogram with a first beveled corner, wherein because of said first beveled corner, said modified first parallelogram comprises more than four sides; and

a second circuit module that is a geometric representation of a second circuit component of the IC, wherein said second circuit module comprises a shape of a modified second parallelogram with a second beveled corner, wherein because of said second beveled corner, said modified second parallelogram comprises more than four sides,

wherein the first and second beveled corners facilitate connecting of non-Manhattan routes to the first and second circuit modules,

wherein at least one of the first and second circuit components is for receiving a signal and performing an electrical operation based on the received signal.

2. The layout of claim 1, wherein said first beveled corner is proximate to said second beveled corner.

3. The layout of claim 1, wherein an interconnect wire exits from said first beveled corner and enters said second beveled corner.

4. The layout of claim 3, wherein said interconnect wiring existing from said first beveled corner exits at an angle perpendicular to said first beveled corner.

5. The layout of claim 1, wherein said first beveled corner is beveled at a forty-five degree angle.

6. The layout of claim 1, wherein said first circuit module is coupled to said second circuit module with at least one diagonal interconnect wire.

7. The layout of claim 6, wherein said diagonal interconnect wire is oriented at a forty-five degree angle.

8. The layout of claim 1, wherein the first and second beveled corners facilitate the use of a non-Manhattan route between the first and second circuit modules.

9. The layout of claim 1, wherein the layout is a floor plan layout that is optimized for non-Manhattan routes.

10. The layout of claim 1, wherein the modified first parallelogram comprises the first beveled corner before any routing operation is performed.

11. A method of specifying a layout for an integrated circuit (“

IC”

), the layout stored on a computer readable medium, wherein said layout is used in a process for designing the IC, said method comprising;

placing a first circuit module that is a geometric representation of a first circuit component of the IC;

placing a second circuit module that is a geometric representation of a second circuit component of the IC;

identifying routing directions that are going to be used in a subsequent routing operation to define routes for connecting the first and second circuit modules;

changing a shape of the first circuit module to include a first beveled corner; and

changing a shape of the second circuit module to include a second beveled corner,

wherein the first and second beveled corners facilitate connecting of non-Manhattan routes to the first and second circuit modules,

wherein at least one of the first and second circuit components is for receiving a signal and performing an electrical operation based on the received signal.

12. The method of claim 11, wherein said first beveled corner is proximate to said second beveled corner.

13. The method of claim 11, wherein said first and second beveled corners are for connecting by an interconnect wire that exits from said first beveled corner and enters said second beveled corner.

14. The method of claim 13, wherein said interconnect wiring existing from said first beveled corner exits at an angle perpendicular to said first beveled corner.

15. The method of claim 11, wherein said first beveled corner is beveled at a forty-five degree angle.

16. The method of claim 11, wherein said first circuit module is for coupling to said second circuit module with at least one diagonal interconnect wire.

17. The method of claim 16, wherein said diagonal interconnect wire is oriented at a forty-five degree angle.

18. The method of claim 11, wherein the first and second beveled corners facilitate the use of a non-Manhattan route between the first and second circuit modules.

19. The method of claim 11, wherein the layout is a floor plan layout that is optimized for non-Manhattan routes.

20. The method of claim 11, wherein the layout the shape of the first circuit module is changed to include the first beveled corner before any routing operation is performed.

21. A computer readable medium storing a computer program for specifying a layout for an integrated circuit (“

IC”

), wherein said layout is used in a process for designing the IC, the computer program executable by at least one processor, the computer program comprising sets of instructions for;

placing a first circuit module that is a geometric representation of a first circuit component of the IC;

placing a second circuit module that is a geometric representation of a second circuit component of the IC;

determining that non-Manhattan routes will be used in a subsequent routing operation; and

changing shapes of the first and second circuit modules for facilitating the use of non-Manhattan routes to connect the first and second circuit modules,

wherein at least one of the first and second circuit components is for receiving a signal and performing an electrical operation based on the received signal.

22. The method of claim 21, wherein the set of instructions for changing the shape of the first and second circuit modules comprises a set of instructions for beveling at least one corner of the first and second circuit modules.

23. A method of specifying a layout for an integrated circuit (“

IC”

), wherein said layout is used in a process for designing the IC, said method comprising;

defining a placement for a first circuit module with a first beveled corner in the layout, wherein said first circuit module has been modified to have said first beveled corner before any routing operation is performed; and

defining a placement for a second circuit module with a second beveled corner in the layout, wherein said second circuit module has been modified to have said second beveled corner before any routing operation is performed,

wherein the first and second beveled corners are defined by a non-Manhattan based post processor that adjusts the placement of the first and second circuit modules in view of an ability to route non-Manhattan routes in the layout,

wherein a circuit module is a geometric representation of a circuit component of the IC.

24. The method of claim 23, wherein the first and second beveled corners facilitate connecting of non-Manhattan routes to the first and second circuit modules.

25. The method of claim 23, wherein the layout is a floor plan layout that is optimized for non-Manhattan routes.

26. A computer readable medium storing a computer program for specifying a layout for an integrated circuit (“

IC”

), wherein said layout is used in a process for designing the IC, the computer program executable by at least one processor, the computer program comprising sets of instructions for;

defining a placement for a first circuit module with a first beveled corner in the layout, wherein said first circuit module has been modified to have said first beveled corner before any routing operation is performed; and

defining a placement for a second circuit module with a second beveled corner in the layout, wherein said second circuit module has been modified to have said second beveled corner before any routing operation is performed,

wherein the first and second beveled corners are defined by a non-Manhattan based post processor that adjusts the placement of the first and second circuit modules in view of an ability to route non-Manhattan routes in the layout,

wherein a circuit module is a geometric representation of a circuit component of the IC.