Method and system to differentially enhance sensor dynamic range using enhanced common mode reset

• US 7,507,947 B2
• Filed: 02/12/2007
• Issued: 03/24/2009
• Est. Priority Date: 04/19/2005
• Status: Expired due to Fees

• Current Assignee: Microsoft Technology Licensing LLC (Microsoft Corporation)
• Original Assignee: Canesta Incorporated (Microsoft Corporation)
• Inventors: Salama, Khaled, Bamji, Cyrus
• Primary Examiner(s): Lee; John R
• Application Number:
  US11/705,217
• Publication Number:
  US 20080048100A1
• Time in Patent Office: 771 Days
• Field of Search: 250/208.1, 250/214.1, 250/214.A, 250/214.R, 348/294, 348/301, 348/302, 348/308, 348/396
• US Class Current: 250/214.00A
• CPC Class Codes: G01S 17/08 for measuring distance only indirect measurement G01S17/46; active triangulation systems G01S17/48
• CPC Class Codes: G01S 17/894 3D imaging with simultaneous measurement of time-of-flight at a 2D array of receiver pixels, e.g. time-of-flight cameras or flash lidar
• CPC Class Codes: G01S 7/4863 Detector arrays, e.g. charge-transfer gates
• CPC Class Codes: G01S 7/487 Extracting wanted echo signals , e.g. pulse detection
• CPC Class Codes: H04N 25/57 Control of the dynamic range
• CPC Class Codes: H04N 25/617 for reducing electromagnetic interference, e.g. clocking noise
• CPC Class Codes: H04N 25/65 applied to reset noise, e.g. KTC noise related to CMOS structures by techniques other than CDS
• CPC Class Codes: H04N 25/77 Pixel circuitry, e.g. memories, A/D converters, pixel amplifiers, shared circuits or shared components
• CPC Class Codes: H04N 25/772 comprising A/D, V/T, V/F, I/T or I/F converters
• CPC Class Codes: H04N 25/778 comprising amplifiers shared between a plurality of pixels, i.e. at least one part of the amplifier must be on the sensor array itself
• CPC Class Codes: H04N 3/155 Control of the image-sensor operation, e.g. image processing within the image-sensor
• CPC Class Codes: H04N 3/1568 for disturbance correction or prevention within the image-sensor, e.g. biasing, blooming, smearing correction circuits H04N25/62

Abstract

Effective differential dynamic range and common mode rejection in a differential pixel detector are enhanced by capturing and isolating differential detector charge output before using common mode reset to avoid detector saturation due to common mode components of optical energy to be detected. Differential charge is stored into an integration capacitor associated with an operational amplifier coupled to receive as input the differential detector outputs. Common mode reset is achieved by setting storage capacitors coupled to the outputs of the differential detector at least once within an integration time T before storage potential exceeds a saturation voltage V_sat for the photodetector.

Claims

1. A method to increase effective differential dynamic range and common mode rejection for a differential pixel detector responsive to optical energy having a common mode component, the differential pixel detector including a first photodetector and an associated first capacitor, and a second photodetector and an associated second capacitor, the method comprising:

(a) within an interval preceding start of an integration time T, setting voltage on each said capacitor to a reference voltage whose amplitude is substantially constant during said interval, but which reference voltage can have a substantially constant but different amplitude during another proceeding said interval;

(b) during said integration time T, integrating photocurrent generated by said first photodetector in said first capacitor, and integrating photocurrent generated by said second photodetector in said second capacitor;

(c) within said integration time T, before voltage developed across either said first capacitor or said second capacitor attains a saturation voltage Vsat associated with said differential pixel detector, setting the developed voltage on each said capacitor such that differential pixel detector signal is still determinable; and

(d) within said integration time T and prior to step (c), transferring and storing at least a fraction of charge differential between charge on said first capacitor and charge on said second capacitor so as to isolate and preserve magnitude of differential detection charge so transferred and stored from any subsequent resetting operation at step (c).

2. The method of claim 1, wherein step (d) includes switchingly coupling an operational amplifier configured as an integrator having at least one integration feedback capacitor and having first and second differential inputs respectively coupleable to said first capacitor and said second capacitor, said operational amplifier outputting a signal proportional to charge transferred and stored at step (d).

3. The method of claim 1, wherein step (d) includes switchingly coupling an operational amplifier configured as an integrator having an integration feedback capacitor and having first and second differential inputs respectively coupleable to outputs from said differential photodetector, said operational amplifier outputting a signal proportional to charge transferred and stored at step (d).

4. The method of claim 1, wherein step (d) includes storing said at least a fraction of charge in a third capacitor.

5. The method of claim 1, where within said integration time T, step (b) is carried out at least as many times as step (d).

6. The method of claim 1, where within said integration time T, step (d) is carried out at least as many times as step (b).

7. The method of claim 1, wherein said fraction is at least about 50%.

8. A method to increase effective differential dynamic range and common mode rejection for a differential pixel detector responsive to optical energy having a common mode component, the differential pixel detector including a first differential output and an associated first capacitor, and a second differential output and an associated second capacitor, the method comprising:

(a) within an interval preceding start of an integration time T, setting voltage on each said capacitor to a reference voltage whose amplitude is substantially constant during said interval, but which reference voltage can have a substantially constant but different amplitude during another preceding said interval;

(b) during said integration time T, integrating said first differential output in said first capacitor, and integrating said second differential output in said second capacitor;

(c) within said integration time T, before voltage developed across either said first capacitor or said second capacitor attains a saturation voltage Vsat associated with said differential pixel detector, setting the developed voltage on each said capacitor such that differential pixel detector signal is still determinable; and

(d) within said integration time T and prior to step (c), transferring and storing at least a fraction of charge differential between charge on said first capacitor and charge on said second capacitor so as to isolate and preserve magnitude of differential detection charge so transferred and stored from any subsequent resetting operation at step (c).

9. The method of claim 8, wherein step (d) includes switchingly coupling an operational amplifier configured as an integrator having at least one integration feedback capacitor and having first and second differential inputs respectively coupleable to said first capacitor and said second capacitor, said operational amplifier outputting a signal proportional to charge transferred and stored at step (d).

10. The method of claim 8, wherein step (d) includes switchingly coupling an operational amplifier configured as an integrator having at least one integration feedback capacitor and having first and second differential inputs respectively coupleable to outputs from said differential photodetector, said operational amplifier outputting a signal proportional to charge transferred and stored at step (d).

11. The method of claim 8, wherein step (d) includes storing said at least a fraction of charge in a third capacitor.

12. The method of claim 8, where within said integration time T, step (b) is carried out at least as many times as step (d).

13. The method of claim 8, where within said integration time T, step (d) is carried out at least as many times as step (b).

14. The method of claim 8, wherein said fraction is at least about 50%.

15. A system to increase effective differential dynamic range and common mode rejection in a differential pixel detector responsive to optical energy having a common mode component, the differential pixel detector including a first differential output and an associated first capacitor, and a second differential output and an associated second capacitor, the system comprising:

means for inhibiting said first capacitor and said second capacitor from exceeding a saturation voltage Vsat associated with said differential pixel within an integration time T such that differential pixel detector signal is still determinable; and

means for transferring and storing at least a fraction of charge differential between charge on said first capacitor and charge on said second capacitor so as to isolate and preserve magnitude of differential detection charge so transferred and stored from being affected by operation of said means for inhibiting.

16. The system of claim 15, wherein said fraction is at least about 50%.

17. The system of claim 15, wherein within an interval preceding start of said integration time T, said means for inhibiting sets voltage on said first capacitor and voltage on said second capacitor to a reference voltage whose amplitude is substantially constant during said interval, but which reference voltage can have a substantially constant but different amplitude during another proceeding said interval.