Semiconductor memory cell and semiconductor memory device
First Claim
1. A semiconductor memory device comprising:
- a semiconductor active layer formed over a substrate, wherein the semiconductor active layer contains impurity regions and a channel region interposed between the impurity regions, and wherein side surfaces of the channel region are in contact with insulating films formed over the substrate;
a gate insulating film formed over the semiconductor active layer and the insulating films;
an electric charge accumulating layer formed over the gate insulating film, wherein the electric charge accumulating layer comprises nitride and extends beyond the side surfaces of the channel region; and
a control gate electrode formed over the electric charge accumulating layer.
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Abstract
An insulating film with a linear concave portion is formed and a semiconductor film is formed thereon by deposition. The semiconductor film is irradiated with laser light to melt the semiconductor film and the melted semiconductor is poured into the concave portion, where it is crystallized. This makes distortion or stress accompanying crystallization concentrate on other regions than the concave portion. A surface of this crystalline semiconductor film is etched away, thereby forming in the concave portion a crystalline semiconductor film which is covered with side walls of the concave portion from the sides and which has no other grain boundaries than twin crystal. TFTs and memory TFTs having this crystalline semiconductor film as their channel regions are highly reliable, have high field effect mobility, and are less fluctuated in characteristic. Accordingly, a highly reliable semiconductor memory device which can operate at high speed is obtained.
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Citations
20 Claims
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1. A semiconductor memory device comprising:
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a semiconductor active layer formed over a substrate, wherein the semiconductor active layer contains impurity regions and a channel region interposed between the impurity regions, and wherein side surfaces of the channel region are in contact with insulating films formed over the substrate; a gate insulating film formed over the semiconductor active layer and the insulating films; an electric charge accumulating layer formed over the gate insulating film, wherein the electric charge accumulating layer comprises nitride and extends beyond the side surfaces of the channel region; and a control gate electrode formed over the electric charge accumulating layer. - View Dependent Claims (2, 3, 4, 5)
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6. A semiconductor memory device comprising:
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a semiconductor active layer formed over a substrate, wherein the semiconductor active layer contains impurity regions and a channel region interposed between the impurity regions, wherein side surfaces of the channel region are in contact with insulating films formed over the substrate, and wherein the semiconductor active layer is thinner than the insulating films; a gate insulating film formed over the semiconductor active layer and the insulating films; an electric charge accumulating layer formed over the gate insulating film, wherein the electric charge accumulating layer comprises nitride and extends beyond the side surfaces of the channel region; and a control gate electrode formed over the electric charge accumulating layer. - View Dependent Claims (7, 8, 9, 10)
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11. A semiconductor memory device comprising:
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a semiconductor active layer formed over a substrate, wherein the semiconductor active layer contains impurity regions and a channel region interposed between the impurity regions, and wherein side surfaces of the channel region are in contact with insulating films formed over the substrate; a first gate insulating film formed over the semiconductor active layer and the insulating films; an electric charge accumulating layer formed over the first gate insulating film, wherein the electric charge accumulating layer comprises nitride and extends beyond the side surfaces of the channel region; a second gate insulating film formed over the electric charge accumulating layer; and a control gate electrode formed over the electric charge accumulating layer. - View Dependent Claims (12, 13, 14, 15)
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16. A semiconductor memory device comprising:
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a semiconductor active layer formed over a substrate, wherein the semiconductor active layer contains impurity regions and a channel region interposed between the impurity regions, wherein side surfaces of the channel region are in contact with insulating films formed over the substrate, and wherein the semiconductor active layer is thinner than the insulating films; a first gate insulating film formed over the semiconductor active layer and the insulating films; an electric charge accumulating layer formed over the first gate insulating film, wherein the electric charge accumulating layer comprises nitride and extends beyond the side surfaces of the channel region; a second gate insulating film formed over the electric charge accumulating layer; and a control gate electrode formed over the electric charge accumulating layer. - View Dependent Claims (17, 18, 19, 20)
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Specification