Single-crystal silicon substrate, SOI substrate, semiconductor device, display device, and manufacturing method of semiconductor device

• US 7,508,034 B2
• Filed: 09/24/2003
• Issued: 03/24/2009
• Est. Priority Date: 09/25/2002
• Status: Expired due to Fees

• Current Assignee: Sharp Kabushiki Kaisha (Hon Hai Precision Industry Co., Ltd.)
• Original Assignee: Sharp Kabushiki Kaisha (Hon Hai Precision Industry Co., Ltd.)
• Inventors: Itoga, Takashi, Takafuji, Yutaka
• Primary Examiner(s): MENZ, LAURA MARY
• Application Number:
  US10/668,186
• Publication Number:
  US 20040061176A1
• Time in Patent Office: 2,008 Days
• Field of Search: 257/347, 257/66, 257/59
• US Class Current: 257/347
• CPC Class Codes: H01L 21/26506 in group IV semiconductors
• CPC Class Codes: H01L 21/26566 of a cluster, e.g. using a gas cluster ion beam
• CPC Class Codes: H01L 21/2658 of a molecular ion, e.g. decaborane
• CPC Class Codes: H01L 21/76254 with separation/delamination along an ion implanted layer, e.g. Smart-cut, Unibond
• CPC Class Codes: H01L 2221/68363 used in a transfer process involving transfer directly from an origin substrate to a target substrate without use of an intermediate handle substrate
• CPC Class Codes: H01L 2224/24226 the HDI interconnect connecting to the same level of the item at which the semiconductor or solid-state body is mounted, e.g. the item being planar
• CPC Class Codes: H01L 27/1229 with different crystal properties within a device or between different devices
• CPC Class Codes: H01L 27/1251 comprising TFTs having a different architecture, e.g. top- and bottom gate TFTs
• CPC Class Codes: H01L 27/1266 the substrate on which the devices are formed not being the final device substrate, e.g. using a temporary substrate
• CPC Class Codes: H01L 29/78603 characterised by the insulating substrate or support H01L29/78657 takes precedence
• CPC Class Codes: H01L 29/78654 Monocrystalline silicon transistors
• CPC Class Codes: H01L 29/78666 with normal-type structure, e.g. with top gate
• CPC Class Codes: H01L 29/78675 with normal-type structure, e.g. with top gate
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/01019 Potassium [K]
• CPC Class Codes: H01L 2924/01021 Scandium [Sc]
• CPC Class Codes: H01L 2924/01046 Palladium [Pd]
• CPC Class Codes: H01L 2924/01057 Lanthanum [La]
• CPC Class Codes: H01L 2924/01078 Platinum [Pt]
• CPC Class Codes: H01L 2924/01079 Gold [Au]
• CPC Class Codes: H01L 2924/12032 : Schottky diode
• CPC Class Codes: H01L 2924/12041 : LED
• CPC Class Codes: H01L 2924/12044 : OLED
• CPC Class Codes: H01L 2924/1305 : Bipolar Junction Transistor [BJT]
• CPC Class Codes: H01L 2924/13091 : Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
• CPC Class Codes: H10K 59/12 : Active-matrix OLED [AMOLED] displays

Abstract

A semiconductor device of the present invention is arranged in such a manner that a MOS non-single-crystal silicon thin-film transistor including a non-single-crystal silicon thin film made of polycrystalline silicon, a MOS single-crystal silicon thin-film transistor including a single-crystal silicon thin film, and a metal wiring are provided on an insulating substrate. With this arrangement, (i) a semiconductor device in which a non-single-crystal silicon thin film and a single-crystal silicon thin-film device are formed and high-performance systems are integrated, (ii) a method of manufacturing the semiconductor device, and (iii) a single-crystal silicon substrate for forming the single-crystal silicon thin-film device of the semiconductor device are obtained.

Claims

1. A semiconductor device, comprising:

a non-single-crystal silicon thin-film device manufactured from a non-single-crystal silicon thin film and

a single-crystal silicon thin-film device manufactured from a single-crystal silicon thin film,

wherein the non-single-crystal silicon thin-film device and the single-crystal silicon thin-film device are provided in different areas of an insulating substrate,

wherein the non-single-crystal silicon thin-film is the first non-single-crystal silicon thin-film layer above the insulating substrate, and

wherein the non-single-crystal silicon thin-film and the single-crystal silicon thin-film are each vertically separated from the insulating substrate by a space, or at least one other layer, such that a surface of the non-single-crystal silicon thin-film that is nearest to the insulating substrate and a surface of the single-crystal silicon thin-film that is nearest to the insulating substrate are at different heights above the insulating substrate.

2. The semiconductor device as defined in claim 1, wherein, each of the non-single-crystal silicon thin-film device and the single-crystal silicon thin-film device is either a MOS thin-film transistor or a MIS thin-film transistor.

3. The semiconductor device as defined in claim 2, wherein, in the MOS thin-film transistor, a gate, a gate insulating film, and a silicon film are formed on the insulating substrate in this order.

4. The semiconductor device as defined in claim 2, wherein, a thickness of a silicon thin film of the MOS thin-film transistor is about not more than 600 nm.

5. The semiconductor device as defined in claim 2, wherein, a thickness of a single-crystal silicon thin film of the MOS thin-film transistor is about not more than 100 nm.

6. The semiconductor device as defined in claim 2, wherein, a metal pattern of the MOS single-crystal silicon thin-film transistor is formed under a wiring rule which is more relaxed than a wiring rule of a gate pattern of the MOS single-crystal silicon thin-film transistor.

7. The semiconductor device as defined in claim 1, wherein the single-crystal silicon thin-film device is bonded with the insulating substrate via an intervening inorganic insulating film.

8. The semiconductor device as defined in claim 7, wherein the bond between the single-crystal silicon thin-film device and the intervening inorganic insulating film is a siloxane bond.

9. The semiconductor device as defined in claim 7, wherein, the non-single-crystal silicon thin-film device is either a MOS non-single-crystal silicon thin-film transistor or a MIS non-single-crystal silicon thin-film transistor, and the single-crystal silicon thin-film device is a bipolar single-crystal silicon thin-film transistor.

10. The semiconductor device as defined in claim 7, wherein, the non-single-crystal silicon thin-film device is either a MOS non-single-crystal silicon thin-film transistor or a MIS non-single-crystal silicon thin-film transistor, and the single-crystal silicon thin-film device includes at least either one of a MOS single-crystal silicon thin-film transistor and a bipolar single-crystal silicon thin-film transistor.

11. The semiconductor device as defined in claim 7, wherein, the non-single-crystal silicon thin-film device is either a MOS non-single-crystal silicon thin-film transistor or a MIS non-single-crystal silicon thin-film transistor, and the single-crystal silicon thin-film device includes a MOS single-crystal silicon thin-film transistor, and an image sensor including a Schottky or PN-junction diode or a CCD image sensor.

12. The semiconductor device as defined in claim 10, wherein, a thickness of a single-crystal silicon thin-film of the MOS single-crystal silicon thin-film transistor is thinner than a thickness of a single-crystal silicon thin film of the bipolar single-crystal silicon thin-film transistor.

13. The semiconductor device as defined in claim 9, wherein, the bipolar single-crystal silicon thin-film transistor has such a structure that a base area, a collector area, and an emitter area are formed and provided in one plane.

14. The semiconductor device as defined in claim 9, wherein, a thickness of the single-crystal silicon thin film of the bipolar single-crystal silicon thin-film transistor is about not more than 800 nm.

15. The semiconductor device as defined in claim 1, wherein, the non-single-crystal silicon thin film is either a polycrystalline silicon thin film or a continuous grain silicon thin film, and a MOS thin-film transistor manufactured from the non-single-crystal silicon thin film includes a non-single-crystal silicon film, a gate insulating film, and a gate on the insulating substrate in this order.

16. The semiconductor device as defined in claim 1, wherein, the non-single-crystal silicon thin film is either one of a polycrystalline silicon thin film or a continuous grain silicon thin film, and a MOS thin-film transistor manufactured from the non-single-crystal silicon thin film includes a gate, a gate insulating film, and a non-single-crystal silicon film on the insulating substrate in this order.

17. The semiconductor device as defined in claim 1, wherein, the non-single-crystal silicon thin film is an amorphous silicon thin film, and a MOS thin-film transistor or a MIS thin-film transistor, which is manufactured from the non-single-crystal silicon thin film, includes a gate, a gate insulating film, and a non-single-crystal silicon film on the insulating substrate in this order.

18. The semiconductor device as defined in claim 1, wherein, the non-single-crystal silicon thin film is an amorphous silicon thin film, and a MOS thin-film transistor or a MIS thin-film transistor, which is manufactured from the non-single-crystal silicon thin film, includes a non-single-crystal silicon film, a gate insulating film, and a gate on the insulating substrate in this order.

19. The semiconductor device as defined in claim 1, wherein, a difference of linear expansion between a single-crystal silicon constituting the single-crystal silicon thin-film device and the insulating substrate is about not more than 250 ppm, within a temperature range from a substantially room temperature to 600°

C.

20. The semiconductor device as defined in claim 1, wherein, the insulating substrate is a high strain point glass including an alkaline-earth alumino-borosilicate glass, and a SiO2 film is formed at least in an area on a surface of the insulating substrate, where the single-crystal silicon thin-film device is to be formed.

21. The semiconductor device as defined in claim 1, wherein, the insulating substrate is manufactured from at least one glass selected from the group consisting of a barium-borosilicate glass, a barium-alumino-borosilicate glass, an alkaline-earth alumino-borosilicate glass, a borosilicate glass, an alkaline-earth zinc-lead-alumino-borosilicate glass, and an alkaline-earth zinc-alumino-borosilicate glass.

22. The semiconductor device as defined in claim 1, wherein, an aligning mark formed on the single-crystal silicon is detected using visible light or light whose wavelength is shorter than the visible light, through a transparent substrate, and has a form which allows the aligning mark to be aligned with an aligning mark formed on the transparent substrate.

23. A semiconductor device, comprising;

a non-single-crystal silicon thin-film device manufactured from a non-single-crystal silicon thin film and a single-crystal silicon thin-film device manufactured from a single-crystal silicon thin film,

wherein the non-single-crystal silicon thin-film device and the single-crystal silicon thin-film device are provided in different areas of an insulating substrate,

wherein the single-crystal silicon thin-film device is bonded with the insulating substrate via an intervening inorganic insulating film,

wherein, the non-single-crystal silicon thin-film device is either a MOS non-single-crystal silicon thin-film transistor or a MIS non-single-crystal silicon thin-film transistor, and the single-crystal silicon thin-film device is a bipolar single-crystal silicon thin-film transistor, and

wherein, a metal wiring and a contact pattern of the bipolar single-crystal silicon thin-film transistor include respective parts each being formed in accordance with a wiring rule which is more relaxed than a wiring rule of a base pattern of the bipolar single-crystal silicon thin-film transistor.

24. A semiconductor device, comprising:

a non-single-crystal silicon thin-film device manufactured from a non-single-crystal silicon thin film and a single-crystal silicon thin-film device manufactured from a single-crystal silicon thin film,

wherein the non-single-crystal silicon thin-film device and the single-crystal silicon thin-film device are provided in different areas of an insulating substrate, and

wherein, a margin of alignment of at least a part of a pattern on the single-crystal silicon is fine so as to be smaller than a margin of alignment of patterns on any one of an entire surface of a mother board, a display area, and an entirety of the non-single-crystal silicon thin-film device and the single-crystal silicon thin-film device.