Digital amplifier, pulse width modulator thereof and method for reducing pop noise for the same

• US 7,508,873 B2
• Filed: 07/28/2005
• Issued: 03/24/2009
• Est. Priority Date: 05/17/2005
• Status: Expired due to Fees

• Current Assignee: Abov Semiconductor Co., Ltd.
• Original Assignee: PULSUS Technologies, Inc.
• Inventors: Kim, Tae Ho, Oh, Jong Hoon
• Primary Examiner(s): Liu; Shuwang
• Assistant Examiner(s): MCKIE, GINA M
• Application Number:
  US11/192,293
• Publication Number:
  US 20060262843A1
• Time in Patent Office: 1,335 Days
• Field of Search: None
• US Class Current: 375/238
• CPC Class Codes: H03F 1/26 Modifications of amplifiers to reduce influence of noise generated by amplifying elements
• CPC Class Codes: H03F 1/305 in case of switching on or off of a power supply
• CPC Class Codes: H03F 2200/342 Pulse code modulation being used in an amplifying circuit
• CPC Class Codes: H03F 2200/351 Pulse width modulation being used in an amplifying circuit
• CPC Class Codes: H03F 3/217 Class D power amplifiers; Switching amplifiers

Abstract

A pulse width modulator for use in a digital amplifier, includes a pop noise reducer for reducing pop noise by controlling a width and a phase of a pulse of a PWM signal output from the pulse width modulator, wherein the pop noise reducer contains: a PWM pulse register for storing a width and a phase values of a pulse of the PWM signal; and a pulse generator for outputting the PWM signal according to the values stored in the PWM pulse register. The pulse width modulator reduces pop noise generated when power supply to a digital amplifier is started and interrupted.

Claims

1. A pulse width modulator for use in a digital amplifier, comprising:

a pop noise reducer for reducing pop noise by controlling a width and a phase of a pulse of a pulse width modulation (PWM) signal output from the pulse width modulator,

wherein the pop noise reducer includes;

a PWM pulse register for storing a width and a phase values of a pulse of the PWM signal; and

a pulse generator for outputting the PWM signal according to the values stored in the PWM pulse register

wherein a PWM amplifier of one of a PN half bridge type and a PN full bridge type using both a P channel MOSFET and an N channel MOSFET is connected to an output port of the pulse width modulator and the pop noise reducer gradually increases the pulse width of the PWM signal over at least two pulses when power is applied to the digital amplifier.

2. The pulse width modulator as claimed in claim 1, wherein the pop noise reducer generates a pulse having a minimum width during a time interval M1 from a beginning of power supply to the digital amplifier and gradually widens the pulse width during a time interval S1, the time intervals S1 and M1 being controllable values.

3. The pulse width modulator as claimed in claim 2, wherein the pop noise reducer gradually increases the pulse width of the PWM signal exponentially during the time interval S1.

4. A pulse width modulator for use in a digital amplifier, comprising:

a pop noise reducer for reducing pop noise by controlling a width and a phase of a pulse of a pulse width modulation (PWM) signal output from the pulse width modulator,

wherein the pop noise reducer includes;

a PWM pulse register for storing a width and a phase values of a pulse of the PWM signal; and

a pulse generator for outputting the PWM signal according to the values stored in the PWM pulse register,

wherein a PWM amplifier of an NN half bridge type using only N channel MOSFETs is connected to an output port of the pulse width modulator, the pop noise reducer controls a PWM plus signal and a PWM minus signal to maintain the same phase when power is applied to the digital amplifier, and, after passage of a predetermined time interval, the pop noise reducer changes their phases to be opposite to each other during a predetermined time, and then, gradually increases the pulse width thereof while maintaining their phases to be opposite to each other.

5. A pulse width modulator for use in a digital amplifier, comprising:

a pop noise reducer for reducing pop noise by controlling a width and a phase of a pulse of a pulse width modulation (PWM) signal output from the pulse width modulator,

wherein the pop noise reducer includes;

a PWM pulse register for storing a width and a phase values of a pulse of the PWM signal; and

a pulse generator for outputting the PWM signal according to the values stored in the PWM pulse register,

wherein a PWM amplifier of an NN full bridge type using only N channel MOSFETs is connected to an output port of the pulse width modulator, and the pop noise reducer controls a PWM plus signal and a PWM minus signal to maintain the same phase when power is applied to the digital amplifier, and, after passage of a predetermined time interval, the pop noise reducer changes their phases to be opposite to each other during a predetermined time, and then, controls a PWM plus signal and a PWM minus signal to have a constant pulse width.

6. A method for reducing pop noise in a digital amplifier using a pulse width modulator, the method comprising:

(a) supplying electric power in order to drive the digital amplifier;

(b) outputting a pulse width modulation (PWM) signal having a controlled pulse width and controlled pulse phase during a predetermined time interval by the pulse width modulator after beginning of the supply of the electric power; and

(c) outputting a normal PWM signal by the pulse width modulator after the controlled PWM signal is output,

wherein step (b) is performed by setting a width and a phase values of outputted from a PWM pulse resister of the pulse width modulator, and

in step (b), the pulse width of the PWM signal is gradually increased over at least two pulses when an output port of the pulse width modulator is connected to a PWM amplifier of a PN half bridge type or a PN full bridge type using both a P channel MOSFET and an N channel MOSFET.

8. The method as claimed in claim 6, wherein step (b) includes:

(b1) generating a pulse having a minimum pulse width during a time interval M1 after beginning of power supply to the digital amplifier; and

(b2) gradually increasing a pulse width during a time interval S1, the time intervals S1 and M1 being controllable values.

7. A method for reducing pop noise in a digital amplifier using a pulse width modulator, the method comprising:

(a) supplying electric power in order to drive the digital amplifier;

(b) outputting a pulse width modulation (PWM) signal having a controlled pulse width and controlled pulse phase during a predetermined time interval by the pulse width modulator after beginning of the supply of the electric power;

(c) outputting a normal PWM signal by the pulse width modulator after the controlled PWM signal is output,

(d) interrupting electric power supply in order to stop operation of the digital amplifier;

(e) outputting a PWM signal having a controlled pulse width and controlled pulse phase by the pulse width modulator during a predetermined time interval after interruption of the electric power supply; and

(f) stopping output of the PWM signal by the pulse width modulator after the controlled PWM signal is output

wherein step (b) is performed by setting a width and a phase values outputted from a PWM pulse resister of the pulse width modulator, and

in step (e), the pulse width of the PWM signal is gradually decreased over at least two pulses when an output port of the pulse width modulator is connected to a PWM amplifier of a PN half bridge type or a PN full bridge type using both a P channel MOSFET and an N channel MOSFET.

9. The method as claimed in claim 7, wherein step (e) includes:

(e1) gradually decreasing a pulse width during a time interval S2 after interruption of power supply to the digital amplifier; and

(e2) generating a pulse having a minimum pulse width during a time interval M2, the time intervals S2 and M2 being controllable values.

10. A method for reducing pop noise in a digital amplifier using a pulse width modulator, the method comprising:

(a) supplying electric power in order to drive the digital amplifier;

(b) outputting a pulse width modulation (PWM) signal having a controlled pulse width and controlled pulse phase during a predetermined time interval by the pulse width modulator after beginning of the supply of the electric power; and

(c) outputting a normal PWM signal by the pulse width modulator after the controlled PWM signal is output,

wherein step (b) is performed by setting a width and a phase values outputted from a PWM pulse resister of the pulse width modulator

wherein, in step (b), when an output port of the pulse width modulator is connected to a PWM amplifier of an NN half bridge type using only N channel MOSFETs, a PWM plus signal and a PWM minus signal are initially controlled to maintain the same phase during a predetermined time interval and are then controlled to change their phases opposite to each other during a predetermined time interval and are then controlled to increase the pulse width thereof while maintaining their phases to be opposite to each other.

11. A method for reducing pop noise in a digital amplifier using a pulse width modulator, the method comprising:

(a) supplying electric power in order to drive the digital amplifier;

(b) outputting a pulse width modulation (PWM) signal having a controlled pulse width and controlled pulse phase during a predetermined time interval by the pulse width modulator after beginning of the supply of the electric power; and

(c) outputting a normal PWM signal by the pulse width modulator after the controlled PWM signal is output,

wherein step (b) is performed by setting a width and a phase values outputted from a PWM pulse resister of the pulse width modulator,

wherein, in step (b), when an output port of the pulse width modulator is connected to a PWM amplifier of an NN full bridge type using only N channel MOSFETs, a PWM plus signal and a PWM minus signal are controlled to maintain the same phase when power is applied to the digital amplifier, and, after passage of a predetermined time interval, the pop noise reducer changes their phases to be opposite to each other during a predetermined time, and then, controls the PWM plus signal and the PWM minus signal to have a constant pulse width.

12. A digital amplifier employing a pulse width modulation scheme, the digital amplifier comprising:

a pulse width modulation (PWM) modulator for pulse width modulating an audio signal;

a pop noise reducer connected to the PWM modulator for controlling a pulse width and a phase of a PWM signal;

a PWM amplifier for amplifying the PWM signal and outputting the amplified PWM signal;

a low pass filter for filtering the amplified PWM signal and outputting an analog signal; and

a speaker for reproducing the analog signal,

wherein the pop noise reducer includes;

a PWM pulse register for storing a width and a phase values of a pulse of the PWM signal; and

a pulse generator for outputting the PWM signal according to the values stored in the PWM pulse register

wherein, if a PWM amplifier of a PN half bridge type or a PN full bridge type using both a P channel MOSFET and an N channel MOSFET is connected to an output port of the pulse width modulator, the pop noise reducer gradually increases the pulse width of the PWM signal over at least two pulses when power is applied to the digital amplifier.

13. The digital amplifier as claimed in claim 12, wherein the pop noise reducer further controls the start and the stop of the PWM amplifier by using an AMP_ENA signal which instructs the PWM amplifier to start or stop.

14. A digital amplifier employing a pulse width modulation scheme, the digital amplifier comprising:

a pulse width modulation (PWM) modulator for pulse width modulating an audio signal;

a pop noise reducer connected to the PWM modulator for controlling a pulse width and a phase of a PWM signal;

a PWM amplifier for amplifying the PWM signal and outputting the amplified PWM signal;

a low pass filter for filtering the amplified PWM signal and outputting an analog signal; and

a speaker for reproducing the analog signal,

wherein the pop noise reducer includes;

a PWM pulse register for storing a width and a phase values of a pulse of the PWM signal; and

a pulse generator for outputting the PWM signal according to the values stored in the PWM pulse register,

wherein a PWM amplifier of an NN half bridge type using only N channel MOSFETs is connected to an output port of the pulse width modulator, the pop noise reducer controls a PWM plus signal and a PWM minus signal to maintain the same phase when power is applied to the digital amplifier, and, after passage of a predetermined time interval, the pop noise reducer changes their phases to be opposite to each other during a predetermined time, and then, gradually increases the pulse width thereof while maintaining their phases to be opposite to each other.

15. A digital amplifier employing a pulse width modulation scheme, the digital amplifier comprising:

a pulse width modulation (PWM) modulator for pulse width modulating an audio signal;

a pop noise reducer connected to the PWM modulator for controlling a pulse width and a phase of a PWM signal;

a PWM amplifier for amplifying the PWM signal and outputting the amplified PWM signal;

a low pass filter for filtering the amplified PWM signal and outputting an analog signal; and

a speaker for reproducing the analog signal,

wherein the pop noise reducer includes;

a PWM pulse register for storing a width and a phase values of a pulse of the PWM signal; and

a pulse generator for outputting the PWM signal according to the values stored in the PWM pulse register,

wherein a PWM amplifier of an NN full bridge type using only N channel MOSFETs is connected to an output port of the pulse width modulator, the pop noise reducer controls a PWM plus signal and a PWM minus signal to maintain the same phase when power is applied to the digital amplifier, and, after passage of a predetermined time interval, the pop noise reducer changes their phases to be opposite to each other during a predetermined time, and then, controls the PWM plus signal and the PWM minus signal to have a constant pulse width.