Integrated fet and schottky device

• US 7,510,953 B2
• Filed: 10/21/2005
• Issued: 03/31/2009
• Est. Priority Date: 08/04/2003
• Status: Expired due to Term

• Current Assignee: Infineon Technologies Americas Corp. (Infineon Technologies AG)
• Original Assignee: International Rectifier Corporation (Infineon Technologies AG)
• Inventors: He, Donald, Sodhi, Ritu, Chiola, Davide
• Primary Examiner(s): Richards; N Drew
• Assistant Examiner(s): Singal; Ankush k
• Application Number:
  US11/255,745
• Publication Number:
  US 20060035422A1
• Time in Patent Office: 1,257 Days
• Field of Search: 438/259, 438/167, 438/570, 438/583
• US Class Current: 438/570
• CPC Class Codes: H01L 2224/0603 Bonding areas having different sizes, e.g. different heights or widths
• CPC Class Codes: H01L 27/0629 in combination with diodes, or resistors, or capacitors
• CPC Class Codes: H01L 29/407 Recessed field plates, e.g. trench field plates, buried field plates
• CPC Class Codes: H01L 29/42368 the thickness being non-uniform
• CPC Class Codes: H01L 29/456 on silicon
• CPC Class Codes: H01L 29/66727 with a step of recessing the source electrode
• CPC Class Codes: H01L 29/7806 the other device being a Schottky barrier diode
• CPC Class Codes: H01L 29/7811 with an edge termination structure guard regions per se H01L29/0619; field plates per se H01L29/402
• CPC Class Codes: H01L 29/7813 with trench gate electrode, e.g. UMOS transistors trench gate electrodes per se H01L29/4236
• CPC Class Codes: H01L 29/8725 of the trench MOS barrier type [TMBS]

Abstract

A semiconductor device including a schottky device and a trench type semiconductor switching device such as a MOSFET formed in a common die.

Claims

1. A method for manufacturing a semiconductor device, comprising:

providing a semiconductor die of one conductivity type;

forming a termination trench in said semiconductor die;

forming a mask over a portion of said semiconductor die;

forming laterally spaced base regions of another conductivity type in said semiconductor die by implanting dopants of said another conductivity type into regions of said semiconductor die not covered by said mask, said base regions being spaced from one another by a region of said one conductivity disposed below said mask;

forming spaced trenches after forming said base regions through said base regions to serve as gate trenches for a semiconductor switching device;

forming a schottky device over said region of said one conductivity type between said base regions;

forming source regions in said base regions adjacent said trenches; and

forming a common first contact in contact with said schottky device and said source regions wherein said termination trench extends to a depth below said gate trenches, and is formed in a step independent of a step for forming said gate trenches.

2. A method according to claim 1, wherein said semiconductor switching device is a trench MOSFET.

3. A method according to claim 1, wherein said schottky device includes a schottky barrier comprised of TiSi₂.

4. A method according to claim 1, further comprising a trench on each side of said region of said one conductivity between said base regions, each trench having an oxide formed on its sidewalls and containing a conductive material, wherein said schottky device includes a schottky barrier in schottky contact with said region of said one conductivity and said conductive material.

5. A method according to claim 3, wherein said schottky device includes a schottky barrier.

6. A method for manufacturing a semiconductor device, comprising:

providing a semiconductor die of one conductivity type;

forming a mask over a portion of said semiconductor die;

forming laterally spaced base regions of another conductivity type in said semiconductor die by implanting dopants of said another conductivity type into regions of said semiconductor die not covered by said mask, said base regions being spaced from one another by a region of said one conductivity disposed below said mask;

forming spaced trenches after forming said base regions through said base regions to serve as gate trenches for a semiconductor switching device;

forming a schottky device over said region of said one conductivity type between said base regions;

forming source regions in said base regions adjacent said trenches; and

forming a common first contact in contact with said schottky device and said source regions.

7. A method according to claim 6, wherein said semiconductor switching device is a trench MOSFET.

8. A method according to claim 6, wherein said schottky device includes a schottky barrier comprised of TiSi₂.

9. A method according to claim 6, further comprising a trench on each side of said region of said one conductivity between said base regions, each trench having an oxide formed on its sidewalls and containing a conductive material, wherein said schottky device includes a schottky barrier in schottky contact with said region of said one conductivity and said conductive material.

10. A method according to claim 6, further comprising forming a region of another conductivity between each base region and said region of said one conductivity, said region of another conductivity extending to a depth below said base region.

11. A method according to claim 6, further comprising a trench on each side of said region of said one conductivity between said base regions, each trench having an oxide formed on its sidewalls and containing a conductive material.