Field effect transistor and method of its manufacture
First Claim
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1. A field effect transistor comprising:
- a semiconductor substrate having dopants of a first conductivity type;
a trench extending a predetermined depth into the semiconductor substrate, wherein a gate structure is formed inside the trench;
a doped well having dopants of a second conductivity type opposite to the first conductivity type and extending into the semiconductor substrate to form a well junction at a first depth;
a doped source region having dopants of the first conductivity type and extending into the semiconductor substrate to form a source junction at a second depth; and
a doped heavy body region having dopants of the second conductivity type and extending into the doped well to form a heavy body junction at a depth that is deeper than the source junction and shallower than the trench,wherein the heavy body region forms an abrupt junction at the interface between the heavy body region having dopants of the second conductivity type and the doped well having dopants of the second conductivity type, such that, when voltage is applied to the transistor, a peak electric filed occurs near the area of the interface.
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Abstract
A trenched field effect transistor is provided that includes (a) a semiconductor substrate, (b) a trench extending a predetermined depth into the semiconductor substrate, (c) a pair of doped source junctions, positioned on opposite sides of the trench, (d) a doped heavy body positioned adjacent each source junction on the opposite side of the source junction from the trench, the deepest portion of the heavy body extending less deeply into said semiconductor substrate than the predetermined depth of the trench, and (e) a doped well surrounding the heavy body beneath the heavy body.
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Citations
51 Claims
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1. A field effect transistor comprising:
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a semiconductor substrate having dopants of a first conductivity type; a trench extending a predetermined depth into the semiconductor substrate, wherein a gate structure is formed inside the trench; a doped well having dopants of a second conductivity type opposite to the first conductivity type and extending into the semiconductor substrate to form a well junction at a first depth; a doped source region having dopants of the first conductivity type and extending into the semiconductor substrate to form a source junction at a second depth; and a doped heavy body region having dopants of the second conductivity type and extending into the doped well to form a heavy body junction at a depth that is deeper than the source junction and shallower than the trench, wherein the heavy body region forms an abrupt junction at the interface between the heavy body region having dopants of the second conductivity type and the doped well having dopants of the second conductivity type, such that, when voltage is applied to the transistor, a peak electric filed occurs near the area of the interface. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21)
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22. A field effect transistor comprising:
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a semiconductor substrate having dopants of a first conductivity type; a plurality of gate-forming trenches arranged substantially parallel to each other, each trench extending to a first depth into said substrate, the space between adjacent trenches defining a contact area; a doped well having dopants of a second conductivity type opposite to the first conductivity type and extending into the semiconductor substrate to form a well junction with the substrate; a doped source region having dopants of the first conductivity type forming a source junction inside the doped well; a heavy body having dopants of the second conductivity type and extending into the doped well to a second depth that is deeper than the source junction; and heavy body contact regions defined at the surface of the semiconductor substrate along the length of the contact area, wherein the heavy body forms an abrupt junction at the interface between the heavy body region having dopants of the second conductivity type and the doped well having dopants of the second conductivity type, such that, when voltage is applied to the transistor, a peak electric filed occurs near the area of the interface. - View Dependent Claims (23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51)
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Specification