IC chip for identification, data-reading method, and data-writing method

• US 7,511,605 B2
• Filed: 09/08/2004
• Issued: 03/31/2009
• Est. Priority Date: 09/11/2003
• Status: Expired due to Fees

• Current Assignee: Fec Co., Ltd., Government of Malaysia Prime Minister's Department
• Original Assignee: Fec Co., Ltd., Government of Malaysia
• Inventors: Kobayashi, Hideki, Taniguchi, Shuhei, Sugimura, Shiro
• Primary Examiner(s): Zimmerman; Brian A
• Assistant Examiner(s): Nguyen; Nam V
• Application Number:
  US10/936,335
• Publication Number:
  US 20050056703A1
• Time in Patent Office: 1,665 Days
• Field of Search: 340/10.2, 340/825.62, 340/825.63, 340/825.64, 340/825.72, 235/492
• US Class Current: 340/10.2
• CPC Class Codes: G06K 19/0701 at least one of the integrated circuit chips comprising an arrangement for power management
• CPC Class Codes: G06K 19/0723 the record carrier comprising an arrangement for non-contact communication, e.g. wireless communication circuits on transponder cards, non-contact smart cards or RFIDs
• CPC Class Codes: G06K 19/0728 the arrangement being an optical or sound-based communication interface

Abstract

Restrictions on the frequency of a carrier signal are removed. This invention comprises a power section for receiving the carrier signal and creating an internal voltage, a clock-generating section for creating an internal clock based on a clock pulse that is carried by the carrier signal, a memory section, a writing section for storing data that is carried on an optical signal in the memory section, and an output section for reading the data in the memory and load-modulating the carrier signal.

Claims

1. An IC chip for identification, comprising:

a power section that creates an internal voltage by using a carrier wave from the outside;

a clock-generating section that extracts a clock pulse from the carrier wave on which the clock pulse is superimposed, thereby allowing the extracted clock pulse to perform as an internal clock;

a memory section;

a writing section that receives an optical signal in compliance with the clock pulse from the carrier wave on which data is superimposed from the outside, the writing section serially extracts the data from the optical signal in synchronization with the internal clock, and the writing section further stores the data in the memory section; and

an output section that serially reads the data in the memory section in synchronization with the internal clock, and load-modulates the carrier wave.

2. The IC chip for identification as described in claim 1, wherein the writing section detects data overflow and blocks writing to the memory section accordingly solely in response to the data overflow.

3. The IC chip for identification as described in claim 2, wherein the clock-generating section is coupled directly to the carrier wave from outside distinguishes the clock pulse that is carried by the carrier wave.

4. The IC chip for identification as described in claim 2, further comprising a bump for connecting an outside antenna, the bump being fitted to an on-chip antenna that connects to the output section.

5. The IC chip for identification as described in claim 1, further comprising a bump for connecting an outside antenna, the bump being fitted to an on-chip antenna that connects to the output section.

6. The IC chip for identification as described in claim 1, wherein the carrier wave is a carrier wave which only carries a clock pulse.

7. The IC chip for identification as described in claim 1, wherein the frequency of the carrier wave is free of any restrictions.

8. The IC chip for identification as described in claim 1, wherein an outside reader that transmits the carrier wave is able to read the data from the memory section via the carrier wave with the IC chip and the outside reader having no dependency on the carrier wave.

9. A method for writing and reading data in an IC chip for identification, the method comprising:

creating an internal voltage by using a carrier wave from the outside;

extracting a clock pulse from the carrier wave on which the clock pulse is superimposed, thereby allowing the extracted clock pulse to perform as an internal clock;

receiving an optical signal in compliance with the clock pulse extracted from the carrier wave on which data is superimposed from the outside;

further storing the data in a memory section;

serially reading the data in the memory section in synchronization with the internal clock; and

load-modulating the carrier wave.

10. The method for writing and reading data in an IC chip for identification as described in claim 9, further comprising:

detecting data-overflow and blocking writing to the memory section accordingly solely in response to the data overflow.

11. The method for writing and reading data in an IC chip for identification as described in claim 9, wherein the carrier wave used is a carrier wave which only carrier a clock pulse.

12. The method for writing and reading data in an IC chip for identification as described in claim 9, wherein the frequency of carrier wave has no restrictions on its frequency.

13. The method for writing and reading data in an IC chip for identification as described in claim 9, wherein an outside reader transmits the carrier wave and is able to read the data from the memory section via the carrier wave with the IC chip and the outside reader having no dependency on the carrier wave.