Method of forming mirrors by surface transformation of empty spaces in solid state materials

• US 7,512,170 B2
• Filed: 06/29/2006
• Issued: 03/31/2009
• Est. Priority Date: 05/16/2001
• Status: Active Grant

• Current Assignee: Micron Technology, Inc.
• Original Assignee: Micron Technology, Inc.
• Inventors: Marsh, Eugene P., Geusic, Joseph E.
• Primary Examiner(s): Rodriguez; Armando
• Application Number:
  US11/476,918
• Publication Number:
  US 20070036196A1
• Time in Patent Office: 1,006 Days
• Field of Search: 372/99, 372/107
• US Class Current: 372/99
• CPC Class Codes: G02B 5/0883 with a refractive index gradient rugate filters G02B5/289
• CPC Class Codes: H01S 3/0627 the resonator being monolithic, e.g. microlaser
• CPC Class Codes: H01S 3/08059 Constructional details of the reflector, e.g. shape mirrors in general G02B5/08; mountings for mirrors G02B7/18

Abstract

A multi-layered reflective mirror formed of spaced-apart plate-shaped empty space patterns formed within a substrate is disclosed. The plurality of plate-shaped empty space patterns are formed by drilling holes in the substrate and annealing the substrate to form the spaced-apart plate-shaped empty space patterns.

Claims

1. A method of forming a reflective mirror within a substrate, said method comprising the acts of:

providing a substrate having a melting temperature;

forming a plurality of cylindrical holes within said substrate, each of said plurality of cylindrical holes being defined by a radius R=λ

/4 [(2k+1)/n+(2m+1)] (1/8.89), wherein λ

is a wavelength for which the reflectivity of said reflective mirror is maximum, n is the refraction index of said substrate, and k and m are real integers, and wherein any two adjacent cylindrical holes are spaced apart by a distance Δ

N2=27.83 R3/(2m+1)λ

/4; and

subjecting said substrate to a temperature lower than the melting temperature of said substrate to form a plurality of empty-spaced patterns beneath a surface of and within said substrate, said empty-spaced patterns being sequentially positioned along an optical path of said substrate.

2. The method of claim 1, wherein at least one of said empty-spaced patterns is a plate-shaped empty-spaced pattern.

3. The method of claim 2, wherein at least two of said plate-shaped empty-spaced patterns have same thicknesses.

4. The method of claim 2, wherein at least two of said plate-shaped empty-spaced patterns have different thicknesses.

5. The method of claim 1, wherein said empty-spaced patterns are plate-shaped empty-spaced patterns that are formed simultaneously.

6. The method of claim 5, wherein said plate-shaped empty-spaced patterns are spaced apart uniformly.

7. The method of claim 5, wherein said plate-shaped empty-spaced patterns are spaced apart non-uniformly.

8. The method of claim 1, wherein said substrate comprises a material selected from the group consisting of silicon, quartz, germanium gallium arsenide, and indium gallium arsenide.

9. A method of forming a patterned reflective mask within a substrate, said method comprising the acts of:

providing a quartz substrate;

forming a plurality of cylindrical holes within said quartz substrate, each of said plurality of cylindrical holes being defined by a radius R=λ

/4 [(2k+1)/n+(2m+1)] (1/8.89), wherein λ

is a wavelength for which the reflectivity of said reflective mirror is maximum, n is the refraction index of said substrate, and k and m are real integers, and wherein any two adjacent cylindrical holes are spaced apart by a distance Δ

N2=27.83 R3/(2m+1)λ

/4; and

annealing said quartz substrate at a temperature of at least about 1100°

C. and under an oxidizing ambient, to form a plurality of empty-spaced patterns beneath a surface of and within said quartz substrate, said empty-spaced patterns being sequentially positioned along an optical path of said quartz substrate.

10. The method of claim 9, wherein at least one of said empty-spaced patterns is a plate-shaped empty-spaced pattern.

11. The method of claim 9, wherein at least two of said plate-shaped empty-spaced patterns have same thicknesses.

12. The method of claim 9, wherein at least two of said plate-shaped empty-spaced patterns have different thicknesses.

13. The method of claim 9, wherein said empty-spaced patterns are plate-shaped empty-spaced patterns that are formed simultaneously.

14. The method of claim 13, wherein said plate-shaped empty-spaced patterns are spaced apart non-uniformly.

15. An integrated circuit substrate comprising:

at least one reflective mirror provided beneath a surface of, and within, a semiconductor substrate, said reflective mirror comprising a plurality N of empty-spaced patterns located beneath said surface of and within said substrate, said empty-spaced patterns being positioned along an optical path of said substrate and being surrounded by substrate material, wherein said at least one reflective mirror is characterized by a maximum reflectivity value R_N=(1−

n₁^2N+1/1+n₁^2N+1)², wherein n₁ is the refraction index of the semiconductor substrate and wherein N is the number of empty-spaced patterns.

16. The integrated circuit of claim 15, wherein said empty-spaced patterns include at least one plate-shaped empty-spaced pattern.

17. The integrated circuit of claim 15, wherein each of said empty-spaced patterns has a respective refraction index.

18. The integrated circuit of claim 15, wherein said maximum reflectivity value corresponds to maximum electromagnetic wave reflection for said reflective mirror.

19. The integrated circuit of claim 15, wherein said semiconductor substrate comprises a material selected from the group consisting of silicon, quartz, germanium gallium arsenide, and indium gallium arsenide.

20. The integrated circuit of claim 15, wherein said semiconductor substrate is a silicon-on-insulator substrate or a silicon-on-nothing substrate.

21. The integrated circuit of claim 15, wherein said semiconductor substrate includes a laser.

22. The integrated circuit of claim 21, wherein said laser is a vertical cavity laser and said reflective mirror is located below a junction of said vertical cavity laser.

23. The integrated circuit of claim 21, wherein said laser is a solid state ion laser and said reflective mirror is embedded within at least one end face of said solid state ion laser.