High reliability multilayer circuit substrates

• US 7,514,791 B2
• Filed: 01/06/2005
• Issued: 04/07/2009
• Est. Priority Date: 09/27/2002
• Status: Expired due to Term

• Current Assignee: Medtronic Minimed Incorporated (Medtronic Plc)
• Original Assignee: Medtronic Minimed Incorporated (Medtronic Plc)
• Inventors: Shah, Rajiv, Pendo, Shaun
• Primary Examiner(s): Pham; Long
• Application Number:
  US11/030,235
• Publication Number:
  US 20050146039A1
• Time in Patent Office: 1,552 Days
• Field of Search: 257/750, 257/758
• US Class Current: 257/758
• CPC Class Codes: H01L 21/4857 Multilayer substrates multilayer metallisation on monolayer substrate H01L21/4846
• CPC Class Codes: H01L 21/4867 Applying pastes or inks, e.g. screen printing H01L21/486 takes precedence
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
• CPC Class Codes: H01L 2924/19107 off-chip wires
• CPC Class Codes: H05K 1/162 incorporating printed capacitors
• CPC Class Codes: H05K 2201/0179 Thin film deposited insulating layer, e.g. inorganic layer for printed capacitor
• CPC Class Codes: H05K 2203/0278 Flat pressure, e.g. for connecting terminals with anisotropic conductive adhesive
• CPC Class Codes: H05K 2203/085 Using vacuum or low pressure
• CPC Class Codes: H05K 2203/1476 Same or similar kind of process performed in phases, e.g. coarse patterning followed by fine patterning
• CPC Class Codes: H05K 2203/308 Sacrificial means, e.g. for temporarily filling a space for making a via or a cavity or for making rigid-flexible PCBs
• CPC Class Codes: H05K 3/048 using a lift-off resist pattern or a release layer pattern
• CPC Class Codes: H05K 3/4053 by thick-film techniques
• CPC Class Codes: H05K 3/4061 for via connections in inorganic insulating substrates
• CPC Class Codes: H05K 3/4664 Adding a circuit layer by thick film methods, e.g. printing techniques or by other techniques for making conductive patterns by using pastes, inks or powders H05K3/4647 takes precedence
• CPC Class Codes: H05K 3/467 Adding a circuit layer by thin film methods H05K3/4647 takes precedence

Abstract

A multilayer circuit substrate for multi-chip modules or hybrid circuits includes a dielectric base substrate, conductors formed on the base substrate and a vacuum deposited dielectric thin film formed over the conductors and the base substrate. The vacuum deposited dielectric thin film is patterned using sacrificial structures formed by shadow mask techniques. Substrates formed in this manner enable significant increases in interconnect density and significant reduction of over-all substrate thickness.

Claims

1. A multilayer circuit substrate, comprising:

a dielectric base substrate;

a conductor formed directly on a surface of the base substrate; and

a patterned vacuum deposited dielectric thin film formed on the base substrate and the conductor; and

wherein the thin film has a thickness of about 0.0000004 to about 0.0008 inches.

2. The structure claimed in claim 1, further comprising an electronic component mounted on the deposited dielectric thin film and electrically connected to the conductor through the deposited dielectric layer.

3. The structure claimed in claim 1, further comprising:

a second conductor formed on the deposited dielectric thin film and connected to the first conductor through the deposited dielectric thin film; and

a second patterned vacuum deposited dielectric thin film formed on the deposited dielectric layer and the second conductor.

4. The structure claimed in claim 3, further comprising an electronic component mounted on the second deposited dielectric thin film and electrically connected to the second conductor through the second deposited dielectric thin film.

5. The structure claimed in claim 1, wherein the base substrate comprises a hermetic via, and wherein the conductor is formed in electrical contact with the hermetic via.

6. The structure claimed in claim 1, wherein the base substrate comprises a ceramic composite.

13. The structure claimed in claim 1, wherein the dielectric layer is made of alumina.

7. A multilayer circuit substrate, comprising:

a dielectric base substrate;

a conductor formed on the base substrate; and

a patterned vacuum deposited dielectric thin film formed on and in direct contact with the base substrate and the conductor; and

wherein the thin film has a thickness about 0.0000004 to about 0.0008 inches.

8. The structure claimed in claim 7, further comprising an electronic component mounted on the deposited dielectric thin film and electrically connected to the conductor through the deposited dielectric layer.

9. The structure claimed in claim 7, further comprising:

a second conductor formed on the deposited dielectric thin film and connected to a first conductor through the deposited dielectric thin film; and

a second patterned vacuum deposited dielectric thin film formed on the deposited dielectric layer and the second conductor.

10. The structure claimed in claim 7, further comprising an electronic component mounted on the second deposited dielectric thin film and electrically connected to the second conductor through the second deposited dielectric thin film.

11. The structure claimed in claim 7, wherein the base substrate comprises a hermetic via;

and wherein the conductor is formed in electrical contact with the hermetic via.

12. The structure claimed in claim 7, wherein the base substrate comprises a ceramic composite.

14. The structure claimed in claim 7, wherein the dielectric layer is made of alumina.

15. A multilayer circuit substrate, comprising:

a dielectric base substrate with vias;

a conductor formed in alignment with the via surface on the base substrate;

a patterned vacuum deposited dielectric thin film formed in alignment with the via and the conductor such that, the vias, the conductor and the dielectric thin film remain aligned through sintering; and

wherein the thin film has a thickness of about 0.0000004 to about 0.0008 inches.

16. The structure claimed in claim 15, further comprising an electronic component mounted on the deposited dielectric thin film and electrically connected to the conductor through the deposited dielectric layer.

17. The structure claimed in claim 15, further comprising:

a second conductor formed on the deposited dielectric thin film and connected to a first conductor through the deposited dielectric thin film; and

a second patterned vacuum deposited dielectric thin film formed on the deposited dielectric layer and the second conductor.

18. The structure claimed in claim 15, wherein the base substrate comprises hermetic via;

and wherein the conductor is formed in electrical contact with the hermetic via.

19. The structure claimed in claim 15, wherein the base substrate comprises a ceramic composite.