Receiver for receiving a data stream having first and second reference entries and method for operating the same

• US 7,519,343 B2
• Filed: 11/10/2003
• Issued: 04/14/2009
• Est. Priority Date: 11/21/2002
• Status: Expired due to Fees

• Current Assignee: Fraunhofer Gesellschaft Zur Foerderung Der Angewandten Forsching E.V.
• Original Assignee: Fraunhofer Gesellschaft Zur Foerderung Der Angewandten Forsching E.V.
• Inventors: Scherl, Christian, Kraegeloh, Stefan
• Primary Examiner(s): Jackson, Blane J
• Application Number:
  US10/546,965
• Publication Number:
  US 20070054643A1
• Time in Patent Office: 1,982 Days
• Field of Search: 375/107, 375/340, 375/345, 375/354, 375/356, 375/371, 375/376, 455/501, 455/502, 455/503, 455/507, 455/63.1, 455/226.1, 455/230, 455/255, 455/256
• US Class Current: 455/258
• CPC Class Codes: H04J 3/0664 unidirectional timestamps
• CPC Class Codes: H04L 12/40052 High-speed IEEE 1394 serial bus bus transfer protocol on a daisy chain bus using an embedded synchronisation G06F13/426

Abstract

A receiver includes a receiver clock oscillator controllable with regard to its receiver oscillator frequency, means for detecting a number of clock periods that the receiver clock oscillator performs in a specifiable period of time, means for extracting a first and a temporally following second reference entry in a received data stream, wherein means for extracting is implemented in order to control means for detecting on the basis of the extracted first and second reference entry with regard to the specifiable period of time, and means for comparing the number of clock periods of the receiver clock oscillator with the information in the second reference entry in order to control the controllable oscillator depending on a comparison result so that the oscillator frequency is increased or decreased so that the oscillator frequency is in a predetermined ratio to a frequency of the clock oscillator in the transmitter or is equal to the frequency of the clock oscillator in the transmitter. This way, in a simple and secure way, without slow phase-locked loops for a jitter suppression, it is guaranteed that the receiver is fixedly synchronized with the transmitter and that simultaneously in case of a receiver array all receivers are also synchronized among each other.

Claims

1. A receiver for receiving a data stream generated by a transmitter, wherein the data stream comprises a first reference entry and a temporally following second reference entry, wherein the second reference entry comprises information about a number of clock periods performed by a clock oscillator in the transmitter since the first reference entry, comprising:

a receiver clock oscillator controllable with regard to its receiver oscillator frequency;

a detector for detecting a number of clock periods that the receiver clock oscillator performs in a specifiable period of time;

an extractor for extracting the first and the second reference entry, wherein the extractor for extracting is implemented in order to control the detector for detecting on the basis of the extracted first and second reference entries with regard to the specifiable period of time; and

a comparator for comparing the number of clock periods of the receiver clock oscillator to the information in the second reference entry,

wherein the comparator for comparing is further implemented in order to control the receiver clock oscillator depending on a comparison result in order to increase or decrease the oscillator frequency such that the oscillator frequency is in a predetermined ratio to a frequency of the clock oscillator in the transmitter or is equal to the frequency of the clock oscillator in the transmitter,

wherein the data stream further includes a sequence of samples or information as a payload from which the sequence of samples is derivable, wherein the sequence of samples is outputtable by a reproduction frequency that is derivable from a frequency of the receiver clock oscillator,

wherein the reproduction frequency and the receiver oscillator frequency are in an integer ratio and the reproduction frequency is smaller than the receiver oscillator frequency,

wherein the receiver further comprises;

a direct frequency divider for providing the reproduction clock from the receiver oscillator clock, and

wherein the data stream is specified according to a format IEEE 1394, wherein the receiver oscillator frequency is 24.576 MHz, wherein the reproduction frequency is 48 kHz, and wherein the direct frequency divider is implemented in order to implement a division ratio of 512.

2. The receiver according to claim 1, wherein the detector for detecting comprises a counter that is startable at the beginning of a specifiable period of time and that is stoppable at the end of a specifiable period of time.

3. The receiver according to claim 2, wherein the extractor for extracting is implemented in order to start the counter in response to extracting the first reference entry and to stop the same in response to extracting the second reference entry.

4. The receiver according to claim 1, wherein the information about the number of clock periods in the second reference entry directly includes the number of clock periods,

wherein the comparator for comparing is implemented, in a case in which the number of the clock periods of the receiver oscillator is smaller than the number of clock periods of the transmitter oscillator, to control the receiver clock oscillator in order to increase its frequency, or in the case in which the number of the clock periods of the receiver oscillator is higher than the number of clock periods of the transmitter oscillator, to control the receiver oscillator in order to decrease its frequency.

5. The receiver according to claim 1,

wherein the comparator for comparing is implemented in order to control the receiver clock oscillator in order to increase or decrease the oscillator frequency by a predetermined amount.

6. The receiver according to claim 5, wherein the predetermined amount is gradually decreased.

7. The receiver according to claim 1, wherein the comparator for comparing is implemented in order to quantitatively calculate an amount, by which the oscillator frequency is increased or decreased, on the basis of a comparison result.

8. The receiver according to claim 1,

wherein the comparator for comparing is implemented to convert an amount, by which the oscillator frequency of the receiver clock oscillator is to be changed, by use of a characteristic curve of the receiver clock oscillator by which a control signal of the receiver oscillator is related to a frequency of the receiver clock oscillator, and the comparison result, into a change of the control signal, so that a current frequency of the receiver clock oscillator corresponds to a frequency of the reference oscillator between the first and the second reference point of time.

9. The receiver according to claim 1, wherein the comparator for comparing is implemented in order to leave a deterministic offset contained in a second reference entry and/or a deterministic offset contained in the number of receiver clock periods out of consideration.

10. A receiver array having a plurality of receivers, wherein each receiver is implemented according to a receiver for receiving a data stream generated by a transmitter, wherein the data stream comprises a first reference entry and a temporally following second reference entry, wherein the second reference entry comprises information about a number of clock periods performed by a clock oscillator in the transmitter since the first reference entry, comprising:

a receiver clock oscillator controllable with regard to its receiver oscillator frequency;

a detector for detecting a number of clock periods that the receiver clock oscillator performs in a specifiable period of time;

an extractor for extracting the first and the second reference entry, wherein the extractor for extracting is implemented in order to control the detector for detecting on the basis of the extracted first and second reference entries with regard to the specifiable period of time; and

a comparator for comparing the number of clock periods of the receiver clock oscillator to the information in the second reference entry,

wherein the comparator for comparing is further implemented in order to control the receiver clock oscillator depending on a comparison result in order to increase or decrease the oscillator frequency such that the oscillator frequency is in a predetermined ratio to a frequency of the clock oscillator in the transmitter or is equal to the frequency of the clock oscillator in the transmitter,

wherein the transmitter is implemented as a master, and

wherein each receiver is implemented in order to obtain the first and the second reference entry from the transmitter so that all receivers are synchronized to the same transmitter,

wherein each receiver is implemented in order to control one or several loudspeakers, and

wherein the transmitter comprises a wave-field synthesis module in order to calculate reproduction information for all loudspeakers that are controllable by the receiver array that are to be output with a specified reproduction frequency.

11. A method for operating a receiver, the receiver comprising a receiver clock oscillator controllable with regard to its receiver oscillator frequency and implemented for receiving a data stream which was generated by a transmitter, wherein the data stream comprises a first reference entry and a temporarily following second reference entry, wherein the second reference entry comprises information about a number of clock periods that a clock oscillator has performed in the transmitter since the first reference entry, comprising:

detecting a number of clock periods that the receiver clock oscillator performs in a specifiable period of time;

extracting the first and the second reference entry;

controlling the step of detecting on the basis of the extracted first and second reference entry with regard to the specifiable period of time;

comparing the number of clock periods of the receiver clock oscillator to the information in the second reference entry; and

controlling the controllable oscillator depending on a comparison result in order to increase or decrease the oscillator frequency so that the oscillator frequency is in a predetermined ratio to a frequency of the clock oscillator in the transmitter or equal to the frequency of the clock oscillator in the transmitter,

wherein the data stream further includes a sequence of samples or information as a payload from which the sequence of samples is derivable, wherein the sequence of samples is outputtable by a reproduction frequency that is derivable from a frequency of the receiver clock oscillator,

wherein the reproduction frequency and the receiver oscillator frequency are in an integer ratio and the reproduction frequency is smaller than the receiver oscillator frequency,

the method further comprising;

providing the reproduction clock from the receiver oscillator clock using a direct frequency divider, and

wherein the data stream is specified according to a format IEEE 1394, wherein the receiver oscillator frequency is 24.576 MHz, wherein the reproduction frequency is 48 kHz, and wherein the direct frequency divider is implemented in order to implement a division ratio of 512.

12. A computer program having a program code stored on a storage medium for performing a method for operating a receiver, the receiver comprising a receiver clock oscillator controllable with regard to its receiver oscillator frequency and implemented for receiving a data stream which was generated by a transmitter, wherein the data stream comprises a first reference entry and a temporarily following second reference entry, wherein the second reference entry comprises information about a number of clock periods that a clock oscillator has performed in the transmitter since the first reference entry, the method comprising:

detecting a number of clock periods that the receiver clock oscillator performs in a specifiable period of time;

extracting the first and the second reference entry;

controlling the step of detecting on the basis of the extracted first and second reference entry with regard to the specifiable period of time;

comparing the number of clock periods of the receiver clock oscillator to the information in the second reference entry; and

controlling the controllable oscillator depending on a comparison result in order to increase or decrease the oscillator frequency so that the oscillator frequency is in a predetermined ratio to a frequency of the clock oscillator in the transmitter or equal to the frequency of the clock oscillator in the transmitter,

wherein the data stream further includes a sequence of samples or information as a payload from which the sequence of samples is derivable, wherein the sequence of samples is outputtable by a reproduction frequency that is derivable from a frequency of the receiver clock oscillator,

wherein the reproduction frequency and the receiver oscillator frequency are in an integer ratio and the reproduction frequency is smaller than the receiver oscillator frequency,

the method further comprising;

providing the reproduction clock from the receiver oscillator clock using a direct frequency divider, and

wherein the data stream is specified according to a format IEEE 1394, wherein the receiver oscillator frequency is 24.576 MHz, wherein the reproduction frequency is 48 kHz, and wherein the direct frequency divider is implemented in order to implement a division ratio of 512,

when the program runs on a computer.

13. A receiver for receiving a data stream generated by a transmitter, wherein the data stream comprises a first reference entry and a temporally following second reference entry, wherein the second reference entry comprises information about a number of clock periods performed by a clock oscillator in the transmitter since the first reference entry, comprising:

a receiver clock oscillator controllable with regard to its receiver oscillator frequency;

a detector for detecting a number of clock periods that the receiver clock oscillator performs in a specifiable period of time;

an extractor for extracting the first and the second reference entry, wherein the extractor for extracting is implemented in order to control the detector for detecting on the basis of the extracted first and second reference entries with regard to the specifiable period of time; and

a comparator for comparing the number of clock periods of the receiver clock oscillator to the information in the second reference entry,

wherein the comparator for comparing is further implemented in order to control the receiver clock oscillator depending on a comparison result in order to increase or decrease the oscillator frequency such that the oscillator frequency is in a predetermined ratio to a frequency of the clock oscillator in the transmitter or is equal to the frequency of the clock oscillator in the transmitter,

wherein the data stream further includes a sequence of samples or information as a payload from which the sequence of samples is derivable, wherein the sequence of samples is outputtable by a reproduction frequency that is derivable from a frequency of the receiver clock oscillator,

wherein the reproduction frequency and the receiver oscillator frequency are in no integer ratio to each other, and

wherein the receiver further includes a phase-locked loop having a loop filter, which is implemented broad-banded such that a clock jitter of the receiver clock oscillator is not suppressed.

14. A method for operating a receiver, the receiver comprising a receiver clock oscillator controllable with regard to its receiver oscillator frequency and implemented for receiving a data stream which was generated by a transmitter, wherein the data stream comprises a first reference entry and a temporarily following second reference entry, wherein the second reference entry comprises information about a number of clock periods that a clock oscillator has performed in the transmitter since the first reference entry, comprising:

detecting a number of clock periods that the receiver clock oscillator performs in a specifiable period of time;

extracting the first and the second reference entry;

controlling the step of detecting on the basis of the extracted first and second reference entry with regard to the specifiable period of time;

comparing the number of clock periods of the receiver clock oscillator to the information in the second reference entry; and

controlling the controllable oscillator depending on a comparison result in order to increase or decrease the oscillator frequency so that the oscillator frequency is in a predetermined ratio to a frequency of the clock oscillator in the transmitter or equal to the frequency of the clock oscillator in the transmitter,

wherein the data stream further includes a sequence of samples or information as a payload from which the sequence of samples is derivable, wherein the sequence of samples is outputtable by a reproduction frequency that is derivable from a frequency of the receiver clock oscillator,

wherein the reproduction frequency and the receiver oscillator frequency are in no integer ratio to each other, and

the receiver further comprising a phase-locked loop having a loop filter, which is implemented broad-banded such that a clock jitter of the receiver clock oscillator is not suppressed.

15. A computer program having a program code stored on a storage medium for performing a method for operating a receiver, the receiver comprising a receiver clock oscillator controllable with regard to its receiver oscillator frequency and implemented for receiving a data stream which was generated by a transmitter, wherein the data stream comprises a first reference entry and a temporarily following second reference entry, wherein the second reference entry comprises information about a number of clock periods that a clock oscillator has performed in the transmitter since the first reference entry, the method comprising:

detecting a number of clock periods that the receiver clock oscillator performs in a specifiable period of time;

extracting the first and the second reference entry;

controlling the step of detecting on the basis of the extracted first and second reference entry with regard to the specifiable period of time;

comparing the number of clock periods of the receiver clock oscillator to the information in the second reference entry; and

controlling the controllable oscillator depending on a comparison result in order to increase or decrease the oscillator frequency so that the oscillator frequency is in a predetermined ratio to a frequency of the clock oscillator in the transmitter or equal to the frequency of the clock oscillator in the transmitter,

wherein the data stream further includes a sequence of samples or information as a payload from which the sequence of samples is derivable, wherein the sequence of samples is outputtable by a reproduction frequency that is derivable from a frequency of the receiver clock oscillator,

wherein the reproduction frequency and the receiver oscillator frequency are in no integer ratio to each other, and

the receiver further comprising a phase-locked loop having a loop filter, which is implemented broad-banded such that a clock jitter of the receiver clock oscillator is not suppressed,

when the program runs on a computer.