Decentralized control system for network connection

• US 7,519,968 B2
• Filed: 03/31/2004
• Issued: 04/14/2009
• Est. Priority Date: 03/10/1999
• Status: Expired due to Fees

• Current Assignee: Hitachi, Ltd.
• Original Assignee: Hitachi, Ltd.
• Inventors: Fujii, Kenjiro, Miyake, Norihisa, Koyama, Masahiro
• Primary Examiner(s): LAFORGIA, CHRISTIAN A
• Application Number:
  US10/812,881
• Publication Number:
  US 20040230980A1
• Time in Patent Office: 1,840 Days
• Field of Search: None
• US Class Current: 718/105
• CPC Class Codes: G05B 19/4148 characterised by using several processors for different functions, distributed (real-time) systems G05B19/4141 takes precedence
• CPC Class Codes: G05B 2219/33273 DCS distributed, decentralised controlsystem, multiprocessor
• CPC Class Codes: G05B 2219/33334 Load balancing, distribution between processors
• CPC Class Codes: G06F 9/5083 Techniques for rebalancing the load in a distributed system

Abstract

In a decentralized control system, a program of the system is described in one form to flexibly cope with changes of the system, and the program developing efficiency, processing performance, and reliability of the system are increased. In configuration, a plurality of control processors and a plurality of devices are connected to a network, the control processors connected to the network are automatically detected and there is determined program execution assignment to possibly equalize the processing load imposed on the control processors. Each control processor executes the program in accordance with the program execution assignment.

Claims

1. A decentralized control system, comprising:

a plurality of processors;

a plurality of devices controlled by said plurality of processors; and

at least one information transmission path for communicating control information between said plurality of processors and for communicating input/output information between said plurality of processors and the devices,

wherein each of said plurality of processors comprises;

processor detecting means for detecting a connection state of each of said plurality of processors with respect to the information transmission path, said connection state showing which processors of said plurality of processors are connected for controlling the plurality of devices, and being represented by an ID of each of said processors,

wherein said processor detecting means generates a list of available processors,

wherein each of said plurality of processors comprises;

program block assigning means for assigning, based on the detected connection state detected by said processor detecting means, a plurality of mutually concurrently executable program blocks to control the device to each of said plurality of processors, respectively,

wherein said program block assigning means divides a program for controlling said devices into said mutually concurrently executable plurality of blocks allowing uniform assignment of a processing load to the processors in accordance with an average number of execution steps or an average processing time for one cycle of each of the plurality of program blocks, generates an assignment list, and distributes the assignment list and said mutually concurrently executable plurality of blocks to said processors; and

program storage means for storing a relevant one of the plurality of mutually concurrently executable program blocks at each of said plurality of processors, each of said plurality of processors executing the stored relevant program blocks, respectively, and

wherein each of said plurality of processors distributes said mutually concurrently executable plurality of blocks and said assignment list, and executes the program blocks based on said assignment list.