Hybrid configurable circuit for a configurable IC

• US 7,521,958 B2
• Filed: 04/23/2007
• Issued: 04/21/2009
• Est. Priority Date: 03/15/2005
• Status: Expired due to Fees

• Current Assignee: Altera Corporation (Intel Corporation)
• Original Assignee: Tabula Incorporated
• Inventors: Schmit, Herman, Teig, Steven, Hutchings, Brad
• Primary Examiner(s): Barnie, Rexford
• Assistant Examiner(s): Crawford, Jason
• Application Number:
  US11/739,095
• Publication Number:
  US 20070257702A1
• Time in Patent Office: 729 Days
• Field of Search: 326 37- 41, 326/47
• US Class Current: 326/38
• CPC Class Codes: H01L 2224/32145 the bodies being stacked
• CPC Class Codes: H01L 2224/32225 the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 2224/48091 Arched
• CPC Class Codes: H01L 2224/48227 connecting the wire to a bond pad of the item
• CPC Class Codes: H01L 2224/73265 Layer and wire connectors
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00014 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/15311 being a ball array, e.g. BGA
• CPC Class Codes: H03K 19/17704 the logic functions being realised by the interconnection of rows and columns
• CPC Class Codes: H03K 19/17728 Reconfigurable logic blocks, e.g. lookup tables
• CPC Class Codes: H03K 19/17736 Structural details of routing resources
• CPC Class Codes: H03K 19/17748 Structural details of configuration resources

Abstract

Some embodiments of the invention provide a configurable integrated circuit (“IC”). This IC includes several configurable logic circuits for receiving configuration data and configurably performing a set of operations based on the configuration data. It also includes several hybrid circuits. Each particular hybrid circuit has: (1) a set of inputs, (2) a set of outputs for selectively connecting to the set of inputs, and (3) a set of select lines for receiving select signals that direct the hybrid circuit to connect the input set to the output set in a particular manner. At least one select signal is for controllably receiving configuration data and at least one select line is for controllably receiving signals generated by the configurable logic circuits.

Claims

1. An integrated circuit (“

IC”

) comprising;

a) a plurality of configurable logic circuits for receiving configuration data and configurably performing a set of operations based on the configuration data; and

b) a plurality of hybrid circuits, each particular hybrid circuit comprising;

1) a set of inputs,

2) a set of outputs for selectively connecting to the set of inputs, and

3) a set of select lines for receiving select signals that direct the particular hybrid circuit to connect the input set to the output set in a particular manner, wherein the particular hybrid circuit (i) performs an interconnect operation when the particular hybrid circuit receives only configuration data on the set of select lines and (ii) performs a logic operation when the particular hybrid circuit receives at least partly non-configuration data on the set of select lines.

2. The IC of claim 1, wherein at least one hybrid circuit supplies an input of one of the configurable logic circuits.

3. The IC of claim 1, wherein at least one hybrid circuit is a configurable routing circuit for configurably routing signals.

4. The IC of claim 1, wherein the non-configuration data comprises at least one signal generated internally by the IC.

5. The IC of claim 4, wherein the non-configuration data comprises user signals.

6. The IC of claim 1, wherein the configurable logic circuits are arranged in an array.

7. The IC of claim 6, wherein the hybrid circuits are interspersed in a repetitive pattern throughout the array.

8. The IC of claim 1, wherein at least one hybrid circuit receives non-configuration data values on all of its select lines in order to perform a logic operation.

9. The IC of claim 1, wherein at least one hybrid circuit receives at least one non-configuration data value and at least one configuration data value simultaneously on the circuit'"'"'s set of select lines, said at least one non-configuration data value causing the hybrid circuit to perform a logic operation that is based on the received non-configuration data values and data received on the hybrid circuit'"'"'s set of inputs.

10. The IC of claim 1 further comprising a plurality of configurable interconnect circuits for configurably performing interconnect operations, wherein the particular hybrid circuit receives the select signals through at least one configurable interconnect circuit.

11. The IC of claim 1 further comprising a plurality of configurable interconnect circuits for configurably performing interconnect operations, wherein at least one configurable logic circuit is for receiving an output of at least one hybrid circuit through at least one configurable interconnect circuit.

12. The IC of claim 1, wherein at least one hybrid circuit'"'"'s logic operation is a Boolean function that accepts a set of operands and supplies a result based on the set of operands, wherein at least one select signal is an operand of the Boolean function.

13. The IC of claim 1 further comprising a switching circuit for selectively supplying a non-configuration data value to at least one select line of at least one hybrid circuit, wherein the switching circuit receives at least one configuration data value and at least one non-configuration data value as input.

14. The IC of claim 1, wherein at least one particular hybrid circuit is a reconfigurable hybrid circuit for receiving different sets of select signals during clock cycles of the IC.

15. The IC of claim 14, wherein at least two different sets of select signals cause the hybrid circuit to first perform an interconnect operation and then perform a logic operation, wherein the two different sets of select signals are received during two different clock cycles, wherein the two different clock cycles are sub-cycles associated with a larger clock cycle of the IC.

16. The IC of claim 14, wherein the reconfigurable hybrid circuit comprises a first switching circuit for selecting between the first and second sets of select signals, wherein said selecting is based on a set of configuration data.

17. An electronic device comprising:

an integrated circuit comprising;

a) a plurality of configurable logic circuits for receiving configuration data and configurably performing a set of operations based on the configuration data; and

b) a plurality of hybrid circuits, each particular hybrid circuit comprising;

1) a set of inputs,

2) a set of outputs for selectively connecting to the set of inputs, and

3) a set of select lines for receiving select signals that direct the particular hybrid circuit to connect the input set to the output set in a particular manner, wherein the particular hybrid circuit (i) performs an interconnect operation when the particular hybrid circuit receives only configuration data on the set of select lines and (ii) performs a logic operation when the particular hybrid circuit receives at least partly non-configuration data on the set of select lines.

18. The device of claim 17 further comprising a memory for supplying configuration data to the IC.

19. A hybrid method of operating a multiplexer in an integrated circuit (IC), said multiplexer comprising sets of input, output, and select lines, the method comprising:

receiving a set of input signals along said select lines;

receiving first and second sets of signals, wherein the first set of signals comprises only configuration data, wherein the second set of signals comprises at least one non-configuration data signal; and

supplying only one of the first and second sets of signals to the set of select lines;

wherein when the first set of signals is supplied to the set of select lines, the multiplexer performs an interconnect operation on the set of input signals;

wherein when the second set of signals is supplied to the set of select lines, the multiplexer performs a logic operation on the set of input signals.

20. The method of claim 19, wherein said supplying comprises selecting between the first and second sets of select signals.

21. The method of claim 20, wherein said selecting is based on configuration data.

22. The method of claim 21, wherein said selecting is based on different sets of configuration data in different operational clock cycles of the IC.

23. The method of claim 22, wherein the different operational clock cycles are parts of a larger clock cycle of the IC.

24. A method for directing an operation of a multiplexer, the method comprising:

receiving a set of potential select signals for the multiplexer, said set comprising a first plurality of configuration data signals and a second plurality of user signals;

using a particular configuration data signal of the first plurality to eliminate a particular user signal of the second plurality from the set of potential select signals; and

from the remaining set of potential select signals that does not comprise the eliminated particular user signal, selecting a subset of the remaining set of potential select signals to supply as select signals to the multiplexer.

25. The method of claim 24, wherein said selecting of said subset of the remaining set of potential select signals to supply as a select signal to the multiplexer is based on at least one configuration data signal.

26. The method of claim 25, wherein the first plurality of configuration data signals does not comprise the at least one configuration data signal that is used to select the subset of the remaining set of potential select signals to supply as a select signal to the multiplexer.

27. An integrated circuit (IC) comprising:

a) a first multiplexer comprising input, output, and select terminal sets;

b) a plurality of storage elements for storing configuration data values that are potential signals for supplying to the select terminal set of the first multiplexer;

c) a second multiplexer for selectively supplying at least one of (i) a particular stored configuration data value and (ii) a first user signal to the select terminal set of the first multiplexer; and

d) a third multiplexer comprising;

i) an input terminal set for receiving the first user signal and a second user signal;

ii) a select terminal set for receiving the particular stored configuration value; and

iii) an output terminal set for supplying the first user signal to the second multiplexer based on the particular stored configuration data value received at said select terminal set.

28. The IC of claim 27 further comprising a fourth multiplexer for receiving a set of the stored configuration signals and selectively outputting a subset of said set, wherein at least a portion of the fourth multiplexer'"'"'s output is supplied to the select terminal set of the first multiplexer.

29. The IC of claim 28, wherein the at least one configuration value received by the second multiplexer comprises a different portion of the output of the fourth multiplexer.