Constant margin CMOS biasing circuit

• US 7,522,003 B2
• Filed: 12/26/2006
• Issued: 04/21/2009
• Est. Priority Date: 12/26/2006
• Status: Active Grant

• Current Assignee: Texas Instruments, Inc.
• Original Assignee: Texas Instruments, Inc.
• Inventors: Seth, Sumantra, Sreenath, Somasunder Kattepura
• Primary Examiner(s): CHOE, HENRY
• Application Number:
  US11/616,043
• Publication Number:
  US 20080150638A1
• Time in Patent Office: 847 Days
• Field of Search: 330/296, 330/285, 330/253, 330/257, 330/261
• US Class Current: 330/296
• CPC Class Codes: G05F 3/205 Substrate bias-voltage generators for static stores G11C5/146
• CPC Class Codes: H03F 1/223 with MOSFET's
• CPC Class Codes: H03F 1/301 in MOSFET amplifiers H03F1/303, H03F1/305, H03F1/308 take precedence
• CPC Class Codes: H03F 2200/453 Controlling being realised by adding a replica circuit or by using one among multiple identical circuits as a replica circuit
• CPC Class Codes: H03F 2200/78 A comparator being used in a controlling circuit of an amplifier
• CPC Class Codes: H03F 2200/91 the amplifier has a current mode topology

Abstract

A biasing circuit is presented. The biasing circuit includes a primary biasing circuit, a replica circuit and an amplifier. The primary circuit provides a biasing voltage and a primary voltage. The biasing voltage is the output of the biasing circuit. The replica biasing circuit provides a replica voltage. The replica biasing circuit includes a first resistive element said first resistive element having a resistive characteristics; a first current source said first current source having the first resistive element for generating a current as a function of the first resistive element; a first node to couple to receive the first current source to generate the replica voltage at the first node; a second current source; a second node to coupled to receive the second current source, and a second resistive element coupled between the first noted and the second node, said second resistive element having substantially similar resistive characteristics to that of the first resistive element. The amplifier having a first input terminal to couple to receive the primary voltage from the primary biasing circuit, a second input terminal to couple to receive the replica voltage from the replica biasing circuit, and an output terminal to couple to the primary biasing circuit to adaptively adjust a current through the primary biasing circuit according to the received voltages. Further, a current mirror circuit is provided having the biasing circuit.

Claims

1. A biasing circuit for a current mirror comprising:

a primary biasing circuit that provides a biasing voltage and a primary biasing voltage, the biasing

voltage being the output of the primary biasing circuit generating an input current for a current mirror;

a replica biasing circuit that provides a replica voltage; and

an amplifier having a first input terminal coupled to receive the primary voltage from the primary biasing circuit, a second input terminal coupled to receive the replica voltage from the replica biasing circuit, and an output terminal coupled to the primary biasing circuit to adaptively adjust a current through the primary biasing circuit according to the received voltages, wherein said replica biasing circuit comprises;

a first resistive element, wherein said first resistive element resistive characteristics;

a first current source, wherein said first current source having the first resistive element for generating a current as a function of the first resistive element;

a first node to couple to receive the first current source to generate the replica voltage at the first node;

a second current source;

a second node to coupled to receive the second current source; and

a second resistive element coupled between the first node

and the second node, said second resistive element having substantially similar resistive characteristics to that of the first resistive element.

2. The biasing circuit as claimed in claim 1, wherein said second input terminal is provided with a transistor.

3. The biasing circuit as claimed in claim 2, wherein said transistor is configured to operate in a saturation region.

4. The biasing circuit as claimed in claim 3, wherein said amplifier is a differential amplifier.

5. The biasing circuit as claimed in claim 1, wherein said replica biasing circuit, amplifier and primary biasing circuits are supplied with a reference current source for driving them.

11. An integrated circuit comprising the biasing circuit according to claim 1.

6. A current mirror circuit comprising:

a biasing circuit, wherein said biasing circuit comprising;

a primary biasing circuit that provides a biasing voltage and a primary voltage, said biasing voltage being the output of the primary biasing circuit and coupled to a current mirror for generating an input current therefor;

a replica biasing circuit that provides a replica voltage; and

an amplifier having a first input terminal coupled to receive the primary voltage from the primary biasing circuit, a second input terminal coupled to receive the replica voltage from the replica biasing circuit, and an output terminal coupled to the primary biasing circuit to adaptively adjust a current through the primary biasing circuit according to the received voltages, wherein said replica biasing circuit comprising;

a first resistive element said first resistive element having a resistive characteristics;

a first current source said first current source having the first resistive element for generating a current as a function of the first resistive element;

a first node to couple to receive the first current source to generate the replica voltage at the first node;

a second current source;

a second node to coupled to receive the second current source; and

a second resistive element coupled between the first node and the second node, said second resistive element having substantially similar resistive characteristics to that of the first resistive element.

7. The current mirror circuit claimed in claim 6, wherein said second input terminal is provided with a transistor.

8. The current mirror circuit as claimed in claim 7, wherein said transistor is configured to operate in a saturation region.

9. The current mirror circuit as claimed in claim 8, wherein said amplifier is a differential amplifier.

10. The current mirror circuit as claimed in claim 6, wherein said replica biasing circuit, amplifier and primary biasing circuits are supplied with a reference current source for driving them.

12. An integrated circuit comprising the current mirror circuit according to claim 6.