Circuit for classifying signals

• US 7,525,349 B2
• Filed: 08/14/2006
• Issued: 04/28/2009
• Est. Priority Date: 08/14/2006
• Status: Expired due to Fees

• Current Assignee: University of Washington
• Original Assignee: University of Washington
• Inventors: Diorio, Chris, Mavoori, Jaideep
• Primary Examiner(s): Dole; Timothy J
• Assistant Examiner(s): ZHU, JOHN X
• Application Number:
  US11/504,390
• Publication Number:
  US 20080125989A1
• Time in Patent Office: 988 Days
• Field of Search: 327/74, 327/75, 324/76.83
• US Class Current: 327/74
• CPC Class Codes: H03F 1/0277 Selecting one or more amplifiers from a plurality of amplifiers
• CPC Class Codes: H03F 3/68 Combinations of amplifiers, e.g. multi-channel amplifiers for stereophonics power amplifiers using a combination of several semiconductor amplifiers H03F3/211; combinations of amplifiers using coupling networks with distributed constants H03F3/602

Abstract

A circuit for classification of analog input signals, comprising an analog memory component, such as a floating gate, used to store a threshold value; a threshold detection module used to determine whether the analog input signal exceeds the threshold value; a time delay module used to delay a processing of the analog signal; a time-amplitude window calculation module used to determine whether an amplitude of the analog input signal is between a lower limit and an upper limit of an amplitude window; and an output module indicating whether the amplitude of the analog signal is between the lower and the upper limit, wherein the indication is used to determine whether the analog input signal belongs to one of a plurality of analog signal classes. The classification is implemented in the analog domain, eliminating the need for sampling and digitizing the analog signal, consequently minimizing circuit area and power.

Claims

1. An array of analog circuits for detection of patterns of analog input signals, the array of analog circuits comprising:

a plurality of input ports operative to receive a plurality of analog input signals;

a plurality of circuits, corresponding to the plurality of the input ports, each operative to receive one of the plurality of the analog input signals, the plurality of the circuits being connected to at least an address bus for selecting one of the plurality of the circuits, an analog bus for delivering the plurality of the analog input signals to a signal processor, and a spike bus for delivering the indications provided by each of the output modules of the plurality of the circuits to the signal processor, each circuit comprising;

a first analog memory component operative to store a threshold value;

a threshold detection module operative to determine whether the analog input signal exceeds the threshold value;

a time delay module operative to delay a processing of the one of the analog input signals by an amount equal to a corresponding window time delay;

an amplitude window calculation module operative to determine, after a lapse of the corresponding window time delay, whether an amplitude of the one of the analog input signals is between a corresponding lower limit and a corresponding upper limit of a corresponding amplitude window; and

an output module providing an indication of whether the amplitude of the one of the analog input signals is between the corresponding lower and the corresponding upper limit of the corresponding amplitude window, wherein the indication is used to determine whether the one of the analog input signals belongs to at least one of a plurality of pre-determined classes of analog signals; and

an array control module operative to select one of the plurality of the circuits, the array control module comprising an address decoder for selecting one of the plurality of the circuits using at least one of the address bus, the analog bus, and the spike bus.

2. The array of analog circuits of claim 1, wherein the plurality of the analog input signals are pre-amplified before being received by the plurality of the input ports.

3. A method for classification of analog signals, the method comprising:

receiving an analog input signal;

in response to receiving the analog input signal, detecting an amplitude of the analog input signal crossing a threshold stored in a first analog memory component;

in response to detecting the amplitude of the input signal crossing the threshold, waiting an amount of time and comparing the amplitude of the input signal to a lower and an upper limit of an amplitude window;

indicating whether the amplitude of the analog input signal is between the lower and the upper limits of the amplitude window; and

using the indication to determine whether the analog input signal belongs to at least one of a plurality of pre-determined classes of analog signals.

4. The method of claim 3, wherein the input signal is provided by an analog signal source.

5. The method of claim 4, wherein the analog signal source comprises live neural tissue.

6. The method of claim 4, wherein the analog signal source comprises a photo sensor.

7. The method of claim 4, wherein the analog signal source comprises a pressure sensor.

8. The method of claim 4, wherein the analog signal source comprises a thermal sensor.

9. The method of claim 4, wherein the analog signal source comprises a seismic motion sensor.

10. The method of claim 3, wherein waiting an amount of time comprises using a time delay module to delay a processing of the input signal.

11. The method of claim 3, wherein the comparing of the amplitude of the input signal to a lower and an upper limit of an amplitude window comprises using an analog comparator component for the comparison.

12. The method of claim 3, wherein the lower and the upper limits of the amplitude window are stored in a second and a third analog memory component, respectively.

13. A method for detection of patterns of signals, the method comprising:

receiving a plurality of analog input signals;

in response to receiving each one of the plurality of analog input signals, detecting an amplitude of each one of the analog input signals crossing a corresponding threshold;

for each of a plurality of positive amplitude peaks and each of a plurality of negative amplitude peaks of each of the plurality of the analog input signals, respectively;

waiting a corresponding amount of time, stored in a corresponding first analog memory component, and comparing the positive amplitude peak and the negative amplitude peak of each of the plurality of analog input signals, respectively, to one of a plurality of lower limits and one of a plurality of upper limits, respectively, of a plurality of corresponding amplitude windows;

indicating whether each of the positive amplitude peaks and each of the negative amplitude peaks of each of the analog input signals is between the corresponding one of the plurality of the lower limits and the corresponding one of the plurality of the upper limits; and

determining, based on the indication for each of the analog input signals, whether each of the analog input signals matches one of a plurality of predetermined signal patterns.

14. The method of claim 13, wherein each of the plurality of the input signals is provided by an analog signal source.

15. The method of claim 13, wherein each of the plurality of the positive amplitude peaks and each of the plurality of the negative amplitude peaks is stored in a corresponding second and third analog memory component, respectively.

16. The method of claim 13, wherein the plurality of the input signals are received by a corresponding plurality of analog signal classifiers organized in a row-addressable and column-addressable array of signal classifiers.

17. The method of claim 16, wherein an output of the array of signal classifiers is multiplexed to provide an output signal of a signal classifier corresponding to a selected row and a selected column of the array of signal classifiers.

18. The method of claim 16, wherein the output of the array of signal classifiers is provided to a signal processor for performing further computations on the plurality of the input signals.

19. A method for classification of signals, the method comprising:

storing an analog threshold value in a first analog memory component;

storing an analog value, based on which a corresponding time-delay value is determined, in a second analog memory component;

storing an analog lower limit of an amplitude window in a third analog memory component;

storing an analog upper limit of an amplitude window in a fourth analog memory component;

receiving an analog input signal;

in response to receiving the analog input signal, detecting an amplitude of the analog input signal crossing the analog threshold value;

in response to detecting the amplitude of the analog input signal crossing the analog threshold value, waiting an amount of time equal to the analog time-delay value and comparing the amplitude of the analog input signal to the analog lower limit and the analog upper limit of the amplitude window;

indicating whether the amplitude of the analog input signal is between the analog lower limit and the analog upper limit of the amplitude window; and

using the indication to determine whether the analog input signal belongs to at least one of a plurality of pre-determined classes of analog signals.

20. The method of claim 19, wherein the first, second, third, and fourth analog memory components comprise a floating gate of a transistor.

21. The method of claim 19, wherein the analog input signal is provided by an analog signal source.

22. The method of claim 19, wherein the storing of the analog threshold value, the analog time-delay value, the analog lower limit, and the analog upper limit is performed via a controller module coupled with the first, second, third, and fourth analog memory components, respectively.