Semiconductor device and method for boosting word line

• US 7,525,853 B2
• Filed: 08/11/2006
• Issued: 04/28/2009
• Est. Priority Date: 08/12/2005
• Status: Active Grant

• Current Assignee: Longitude Flash Memory Solutions, Ltd. (Vector Capital Corporation)
• Original Assignee: Spansion LLC (Infineon Technologies AG)
• Inventors: Kitazaki, Kazuhiro, Kurosaki, Kazuhide
• Primary Examiner(s): Dinh, Son
• Assistant Examiner(s): NGUYEN, NAM THANH
• Application Number:
  US11/502,957
• Publication Number:
  US 20070035973A1
• Time in Patent Office: 991 Days
• Field of Search: 365/189.11, 365/230.06, 365/230.01
• US Class Current: 365/189.11
• CPC Class Codes: H02M 3/073 Charge pumps of the Schenkel-type

Abstract

A semiconductor device of the present invention includes a booster circuit that boosts a selected word line (WL) to a given voltage higher than a power supply voltage and a charge pump circuit that retains the boosted word line (WL) at the first given voltage. When the booster circuit boosts the word line, the voltage level is degraded as the time goes. However, it is possible to program the memory cell and read out thereof properly by retaining the voltage of the word line with the charge pump circuit.

Claims

1. A semiconductor device comprising:

a booster circuit that generates a first given voltage and couples the first given voltage to a selected word line to boost the selected word line to the first given voltage which is higher than a previously applied power supply voltage; and

a charge pump circuit that retains the selected word line at the first given voltage.

2. The semiconductor device as claimed in claim 1, wherein the charge pump circuit is coupled with a node boosted by the booster circuit via a first diode.

3. The semiconductor device as claimed in claim 1, further comprising an address transition detecting circuit that instructs the booster circuit and the charge pump circuit to start operating when detecting a change of address information.

4. The semiconductor device as claimed in claim 1, wherein the charge pump circuit has a plurality of boost stages, and nodes between neighboring boost stages are charged up by a given voltage.

5. The semiconductor device as claimed in claim 1, wherein the booster circuit has a plurality of stages.

6. The semiconductor device as claimed in claim 1, wherein the charge pump circuit retains the selected word line at the first given voltage during a read operation in which data is read from memory cells connected to the selected word line and successively selected.

7. The semiconductor device as claimed in claim 3, wherein the booster circuit produces the first given voltage by a one-shot pulse output by the address transition detecting circuit.

8. The semiconductor device as claimed in claim 1, wherein the charge pump circuit is driven by a clock signal so as to retain the selected word line at the first given voltage.

9. The semiconductor device as claimed in claim 1, wherein the booster circuit and the charge pump circuit respectively include capacitors, and the capacitor of the booster circuit has a capacitance greater than that of the capacitance of the charge pump circuit.

11. The semiconductor device as claimed in claim 2, further comprising a regulation circuit that is connected to a charge pump output node provided between the charge pump circuit and the first diode and retains the charge pump output node at a second given voltage.

12. The semiconductor device as claimed in claim 11, wherein the regulation circuit is coupled with the charge pump output node via a second diode.

13. The semiconductor device as claimed in claim 12, wherein a forward threshold voltage of the second diode is substantially the same as that of the first diode.

14. The semiconductor device as claimed in claim 13, wherein the regulation circuit retains a node provided between the second diode and the regulation circuit at substantially the same voltage as the first given voltage.

10. A method comprising the steps of:

generating a first given voltage;

coupling the first given voltage to a selected word line;

boosting the selected word line to the first given voltage which is higher than a previously applied power supply voltage; and

retaining the selected word line at the first given voltage.

15. A wireless communications device, said wireless communications device comprising:

a flash memory comprising;

a booster circuit that generates a first given voltage and couples the first given voltage to a selected word line to boost the selected word line to the first given voltage which is higher than a previously applied power supply voltage;

and a charge pump circuit that retains the selected word line at the first given voltage;

a processor;

a communications component;

a transmitter;

a receiver; and

an antenna connected to the transmitter circuit and the receiver circuit.

16. The wireless communications device of claim 15, wherein said flash memory is NAND flash memory.

17. The wireless communications device of claim 15, wherein said flash memory is NOR flash memory.

18. The wireless communications device of claim 15, wherein said flash memory utilizes mirrorbits technology.

19. A computing device comprising:

a processor;

an input component;

an output component;

a memory comprising;

a volatile memory; and

a flash memory comprising;

a booster circuit that generates a first given voltage and couples the first given voltage to a selected word line to boost the selected word line to the first given voltage which is higher than a previously applied power supply voltage;

and a charge pump circuit that retains the selected word line at the first given voltage.

20. The computing device of claim 19, wherein said computing device is a personal computer (PC).

21. The computing device of claim 19, wherein said computing device is a personal digital assistant (PDA).

22. The computing device of claim 19, wherein said computing device is a gaming system.

23. A portable media player comprising:

a processor;

a cache;

a user input component;

a coder-decoder component; and

a memory comprising;

a flash memory comprising;

a booster circuit that generates a first given voltage and couples the first given voltage to a selected word line to boost the selected word line to the first given voltage which is higher than a previously applied power supply voltage; and

a charge pump circuit that retains the selected word line at the first given voltage.

24. The portable media player of claim 23, wherein said portable media player is a portable music player.

25. The portable media player of claim 23, wherein said portable media player is a portable video player.

26. An image capturing apparatus comprising:

a sensor for providing image data;

a memory capable of storing said image data, comprising;

a booster circuit that generates a first given voltage and couples the first given voltage to a selected word line to boost the selected word line to the first given voltage which is higher than a previously applied power supply voltage; and

a charge pump circuit that retains the selected word line at the first given voltage;

a display operable to display an image from said image data.