×

System and method for modeling LPAR behaviors in a simulation tool

  • US 7,526,421 B2
  • Filed: 02/27/2004
  • Issued: 04/28/2009
  • Est. Priority Date: 02/27/2004
  • Status: Expired due to Fees
First Claim
Patent Images

1. A method for modeling a behavior of an LPAR (logical partition) in a simulated computer operating in a time slice dispatch mode, comprising:

  • beginning a modeling interval;

    calculating a resource percentage representing a percentage of total resources allocated to the LPAR, wherein the resource percentage is equal to;

    100%−

    a percentage of resources allocated to all other LPARs running in the simulated computer;

    calculating a time slice percentage for the LPAR based on the resource percentage and CP (central processor) data, wherein;

    time



    slice



    percentage
    = ( resource



    percentage
    )
    ×

    ( #



    of



    physical



    CPs
    )
    ( #



    of



    logical



    CPs
    )
    ;

    determining a CP (central processor) percentage representing a percentage of time that all physical CPs in the computer being modeled have been allocated to the LPAR;

    if the CP percentage is greater than the time slice percentage, causing the simulated computer not to dispatch CPs to the LPAR; and

    outputting and displaying the behavior of the modeling.

View all claims
  • 1 Assignment
Timeline View
Assignment View
    ×
    ×